F10016 Search Results

Contextual Info: F100165 Universal Priority Encoder FAIRCHILD A Schlumberger Company F100K ECL Product Description The F100165 contains eight input latches w ith a com m on Enable E follow ed by encoding logic w hich generates the binary address of the highest p rio rity input

m3ub

Abstract: F100160
Contextual Info: F100160 Dual Parity Checker/Generator FAIRCHILD S c h lu m b e rg e r C o m p a n y A F100K ECL Product Connection Diagrams Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the o utput is HIG H when an even num ber of inputs are HIGH. One of the nine inputs la or

fairchild ECL

Abstract: ECL Decade Counter F10010 F10016 ECL binary Counter ecl 10016
Contextual Info: Fiooic/» FlOOie^ BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable. cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre­ settable, cascadable 4-Bit Binary Counter. They are m u ltifu n ctio n MSI building

F100164

Abstract: F100364
Contextual Info: 100164 ZWA National mUrn Semiconductor F100164 16-Input Multiplexer General Description The F100164 is a 16-input multiplexer. Data paths are con­ trolled by four Select lines S0 - S 3 . Their decoding is shown in the truth table. Output data polarity is the same as the

Contextual Info: F100164 16-Input Multiplexer F A IR C H IL D A Schlumberger Company F100K ECL Product Connection Diagrams Description The F100164 is a 16-input multiplexer. Data paths are controlled by four Select lines S 0 - S 3 •Their decoding is shown in the truth table. Output data polarity is the

AABE

Contextual Info: F100166 9-Bit Comparator F A IR C H I^ A Schturn berger Company F100K E C L Product Description The F100166 is a 9-bit magnitude comparator which compares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Other functions can be generated by the

F100163

Contextual Info: F100163 DUAL 8-INPUT MULTIPLEXER F100K SER IES ECL DESCRIPTION — The F100163isadual 8-Input Multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be presented at the Outputs (Z a and Zb respectively). The same bit (0-7) will be selected for both the Z a and Z b output.

F100163

Contextual Info: 100163 National Semiconductor F100163 Dual 8-Input Multiplexer General Description The F100163 is a dual 8 -input multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be present­ ed at the outputs (Za and Zt, respectively). The same bit

ITA 6 V 5 B4

Abstract: ca 3140 ic
Contextual Info: F100166 9-Bit Comparator FAIRCHILD A Schlumberger Company F100K ECL Product Description The F100166 is a 9-bit m agnitude com parator which com pares the arithm etic value of tw o 9 -b it w ords and indicates w hether one w ord is greater than, or equal to, the other. O ther fu n ction s can be generated by the

Contextual Info: FAIRCHILD ECL DATASHEET • F10010 • F10016 SWITCHING CIRCUITS AND WAVEFORMS Cont'd Vcc L-) and L2 = equal length 50 Q impedance lines R j = 50 Q termination of scope CL = Jig and stray capacitance <5.0 pF Fig. 2. Decoupling 0.1 ^F from gnd to VEE and Vqq

cz bc ic

Contextual Info: F100166 9-BIT COMPARATOR F100K SERIES ECL DESCRIPTION - The F100166 is a 9-Bit Magnitude Comparator which compares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to the other. The outputs do not have pull down resistors, which provides the wire OR func­

sj 3159

Contextual Info: 100164 National ju fl Semiconductor F100164 16-Input Multiplexer General Description Th e F100164 is a 16-input m ultiplexer. D ata paths are co n ­ tro lle d by fo u r S e le ct lines S 0 - S 3 . Their deco d ing is shown in the tru th table. O utput data pola rity is th e sam e as the

Contextual Info: 100160 O T National düiI Semiconductor F100160 Dual Parity Checker/Generator General Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the

Contextual Info: 100160 yw\ National Jum Semiconductor F100160 Dual Parity Checker/Generator General Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or y has the

F10010

Abstract: F10016 ECL Handbook F10014
Contextual Info: F A IR C H IL D ECL DATA S H E ET • F10010 • F10016 SW ITCHING CIRCUITS AND W AVEFORMS C ont'd Vcc L-j a n d L 2 = e q u a l le n g th 50 Q im p e d a n c e lin e s R j = 50 Q te rm i n a tio n o f s co p e C l = J ig a n d s tra y c a p a c ita n c e < 5 .0 pF

F100163

Abstract: F100363 F100K
Contextual Info: 100363 O T National ÆÂ Semiconductor F100363 Low Power Dual 8-Input Multiplexer General Description Features The F100163 is a dual 8 -input multiplexer. The Data Select <Sn inputs determine which bit An and Bn) will be present­ ed at the outputs (Za and Z& respectively). The same bit

F100163

Abstract: F100363 B7S2 A4415
Contextual Info: F100163 Dual 8-Input Multiplexer General Description The F100163 is a dual 8-input multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be present­ ed at the outputs (Za and Zb respectively). The same bit (0 -7 ) will be selected for both the Za and Zb output. All

BI223

Abstract: F100166
Contextual Info: 100166 National Semiconductor F100166 9-Bit Comparator General Description The F100166 is a 9-bit magnitude comparator which com­ pares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Ordering Code:

Contextual Info: P A I R C H I L F100160 Dual Parity Checker/Generator D F100K ECL Product Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the shorter through-put delay and is therefore

ECL Decade Counter

Contextual Info: F10010 • F10016 BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable, cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre­ settable, cascadable 4-Bit Binary Counter. They are m ultifunction MSI building

Contextual Info: F100160 DUAL PARITY CHECKER/GENERATOR F100K SERIES ECL DESCRIPTION — The F100160 is a Dual Parity Checker/Generator. Each half has nine inputs, with the output being HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the shorter through-put delay and is therefore preferred as the expansion

100166DC

Contextual Info: National éHASemiconductor F100166 9-Bit Comparator General Description The F100166 is a 9-bit magnitude comparator which com­ pares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Other functions can be generated by the wire-OR of the

Contextual Info: 100165 zw\National á¡A Semiconductor F100165 Universal Priority Encoder General Description The F100165 contains eight input latches with a common Enable E followed by encoding logic which generates the binary address of the highest priority input having a HIGH

B7S2

Contextual Info: F100163 Dual 8-Input Multiplexer FAIRCHILD A Sch lu m b erger C om pany F100K ECL Product Description The F100163 is a dual 8-inp u t m ultiplexer. The Data Select S n inputs determ ine w hich bit (A n and B n ) will be presented at the outputs (Z a and Zb respectively).