F100156 Search Results

BI 370

Abstract: bmg 2
Contextual Info: F100156 Mask-Merge/Latch A Schlumberger Company F100K ECL Product Description The F100156 merges two 4-bit words to form a 4-bit output word. The A M n enable allows the merge of A into B by one, two or three places per the A S n value from the left. The 8 M n enable similarly allows the merge of B

Contextual Info: NATIONAL SEMICOND LOGIC 31E D • bSOllSa 0071177 7 ■ 100156 National Semiconductor F100156 Mask-Merge/Latch General Description The F1001S6 merges two 4-bit words to form a 4-bit output word. The AMn enable allows the merge of A Into B by one, two or three places (per the ASn value) from the left. The

BT 1610 circuit

Abstract: BT 1610
Contextual Info: 100156 i/WA National SLA Semiconductor F100156 Mask-Merge/Latch General Description The F100156 merges two 4-bit words to form a 4-bit output word. The AMn enable allows the merge of A into B by one, two or three places per the ASn value from the left. The

Contextual Info: F100156 Mask-Merge/Latch FAIRCHILD A S c h lu m b e r g e r C o m p a n y F100K ECL Product Description The F100156 merges tw o 4 -b it w ords to form a 4-bit o u tpu t word. The A M n enable allow s the merge of A into B by one, tw o o r three places per the ASn value from

F100156

Abstract: BI 370
Contextual Info: 100156 O T National ÀÆ Semiconductor F100156 Mask-Merge/Latch General Description The F100156 merges two 4-bit words to form a 4-bit output word. The AMn enable allows the merge of A into B by one, two or three places per the ASn value from the left. The

BI 340

Contextual Info: F 100156 MASK-MERGE F100K SERIES ECL DESCRIPTION - The F100156 merges two 4-bit words to form a 4-bit output word. The A M j enable allows the merge of An into B n by one, two, or three places per the A S j value from the left. The B M j enable similarly allows the merge of B n into A n from the left (per the B S j

Contextual Info: Section 3 Contents F100101 Triple 5-Input OR/NOR G a te . F100102 Quint 2-Input OR/NOR Gate .