F100101 Search Results

F100101

Abstract: PM710
Contextual Info: F100101 Triple 5-Input OR/NOR Gate FAIRCHILD A Schlumberger Company F100K ECL Product Description T he F100101 is a m on olithic triple 5-input O R/NOR gate. All inputs have 50 k i l p u ll-dow n resistors and all outputs are buffered. Connection Diagrams

F100101DC

Contextual Info: F100101 Triple 5-Input OR/NOR Gate g g U g g H IU g A Schlumberger Company F100K E C L Product Description The F100101 is a monolithic triple 5-input O R/N O R gate. A ll inputs have 50 k f l pull-down resistors and all outputs are buffered. Connection Diagrams

Contextual Info: Section 3 Contents F100101 Triple 5-Input OR/NOR G a te . F100102 Quint 2-Input OR/NOR Gate .

Contextual Info: NATIONAL SEflICOND LOGIC 31E D hsoiiaa 007104=1 t T-M 5 -7-Z -O O IOT National SjA Semiconductor F100101 Triple 5-input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All Inputs have 50 k il pull-down resistors and all outputs are

100101DC

Contextual Info: 100101 National Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k fl pull-down resistors and all outputs are buffered. Refer to the F100301 datasheet for: PCC packaging

F100101

Abstract: F100301 F100K
Contextual Info: 100301 £3 National Semiconductor F100301 Low Power Triple 5-Input OR/NOR Gate General Description Features The F100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k iî pull-down resistors and all outputs are buttered. • ■ ■ ■ 23% power reduction of the F100101

F100101

Abstract: m 9835 F100301 98355
Contextual Info: 100101 E Jï National ÉjA Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k il pull-down resistors and all outputs are buffered. Ordering£ode: Refer to the F100301 datasheet for:

ScansU9X23

Contextual Info: F100101 Triple 5-Input OR/NOR Gate F100K ECL Product Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k i l pull-down resistors and all outputs are buffered. Connection Diagrams 24-Pin DIP Top View Pin Names Dna, Dnb, Dnc

F100101

Abstract: F100301
Contextual Info: 100101 National É jA Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description Th e F100101 is a m onolithic triple 5-input O R /N O R gate. All inputs have 50 k i l pull-dow n resistors and all o utputs are buffered. Ordering£ode: R efer to th e F100301 datasheet for:

Contextual Info: 100101 KgM National ÉjA Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k il pull-down resistors and all outputs are buffered. Ordering~Code: Refer to the F100301 datasheet for:

F100K ECL Users Handbook

Abstract: F100101 3R12E b2teq AN-674 C1995 DP83231 DP83241 DP83251 DP83261
Contextual Info: National Semiconductor Application Note 674 Bruce Wolfson January 1991 This application note covers basic PCB layout recommendations and design techniques for high speed signal distribution in National’s FDDI system Due to the high signal speeds in FDDI proper layout is critical Many digital designers are not aware of problems that can arise in a high speed

transistor cross reference

Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
Contextual Info: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC

Contextual Info: F100K INTRODUCTION Competitive pressure in the data processing industry, with ever-increasing data volumes and new architec­ tures, has stimulated the need for faster processing rates, higher machine densities, and greater system reliability. These requirements can only be met by the use of higher speed integrated circuits with more onchip integration and multipurpose logic functions. Advanced packaging techniques and optimum system