DSC46 Search Results

ALVC126

Abstract: IDT74ALVC126
Contextual Info: IDT74ALVC126 3.3V CMOS QUADRUPLE BUS BUFFER GATE EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS IDT74ALVC126 ADVANCE INFORMATION DESCRIPTION: FEATURES: – – 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015;

LVCH16540A

Abstract: LVCH16540
Contextual Info: IDT74LVCH16540A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74LVCH16540A 3.3V CMOS16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – –

LVCH373A

Contextual Info: IDT74LVCH373A 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – IDT74LVCH373A

Contextual Info: 3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO 262,144 x 9 524,288 x 9 FEATURES: • • • • • • • • • • • • • • • • Choose among the following memory organizations: IDT72V2101 ⎯ 262,144 x 9 IDT72V2111 ⎯ 524,288 x 9 Pin-compatible with the IDT72V261/72V271 and the IDT72V281/

Contextual Info: IDT54/74FCT163652/A/C PRODUCT PREVIEW 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS Integrated Device Technology, Inc. FEATURES: • 0.5 MICRON CMOS Technology • Typical tsK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: 3.3 VOLT CMOS SyncBiFlFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 Integrated Device Technology, Inc. PRELIMINARY IDT72V3624 IDT72V3634 IDT72V3644 • M aster R eset clears d ata and configures FIFO, Partial R eset clears data but retains configuration settings

Contextual Info: IDT74FST3245/ IDT74FST32245 PRELIMINARY OCTAL BUS SWITCH In te g rate d D e vic e Technology, Inc. FEATURES: an n-channel FE T . W hen the gate-to-source junction of this F E T is adequately forward-biased the device conducts or the resistance between input and output ports is small. W ithout

Contextual Info: 3.3 VOLT CMOS SUPERSYNC FIFO 16,384x9 32,768 x 9 J d t PRELIMINARY IDT72V261 LA IDT72V271 LA Integrated Device Technology, Inc. FEATURES: • C hoose among the following m em ory organizations: IDT72V261 LA 1 6 ,3 8 4 x 9 IDT72V271 LA 3 2 ,7 6 8 x 9 • P in -c o m p a tib le w ith th e ID T 7 2 V 2 8 1 /7 2 V 2 9 1 and

Contextual Info: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER dt) IDT54/74FCT163501/A/C Integrated Devi«;e Technology, Inc. FEATURES: ers a re built using a d v a n c e d du al m eta l C M O S te ch n o lo g y . • 0 .5 M IC R O N C M O S T e c h n o lo g y T h e s e h ig h -s p e e d , lo w -p o w e r 1 8 -b it reg is te re d bus tra n s c e iv ­

Contextual Info: 3.3 V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS BE FEATURES: - 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - 0.635mm pitch SSOP, 0.50mm pitch TSSOP,

Contextual Info: 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - 1,27mm pitch SOIC, 0.635mm pitch QSOP,

72V3680

Contextual Info: 3.3 VOLT HIG H-DENSITY SUPERSYNC II 36-B IT FIFO 4,096 x 36 8,192 x 36 1 6 ,3 8 4 x 3 6 32,768 x 36 65,536 x 36 131,072 x 36 P R E L IM IN A R Y ID T 72V 3660 ID T 72V 3670 ID T 72V 3680 ID T 72V 3690 ID T 72V 36100 ID T 72V 36110 FEATURES: Auto power down minimizes standby power consumption

Contextual Info: 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; IDT74LVC823A ADVANCE INFORMATION D E S C R IP TIO N : The LVC823A 9-bit bus-interface flip-flop is built using advanced dual

Contextual Info: FAST CMOS OCTAL LATCHED TRANSCEIVER Integrated Device Technology« Inc. IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C FEATURES: DESCRIPTION: • • • • The IDT54/74FCT543/A/C is a non-inverting octal trans­ ceiver built using advanced CEMOS , a dual metal CMOS

Contextual Info: PRELIMINARY IDT54/74FCT163646/A 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS Integrated D e v ice T echnology, Inc. FEATURES: These high-speed, low-power devices are organized as two independant 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed

Contextual Info: OCTAL BUS EXCHANGE SWITCH IDT74FST3383 IDT74FST32383 PRELIMINARY Integrated Device Technology, Inc The FST3383/32383belongto IDT'sfamily ot Bus Switches. Bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink

Contextual Info: 3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO 262,144x9 524,288 x 9 PRELIMINARY IDT72V2101 IDT72V2111 Integrated Device Technology, Inc. FEATURES: • Choose among the following memory organizations: IDT72V2101 2 6 2 ,1 4 4 x 9 IDT72V2111 5 2 4 ,2 8 8 x 9 • P in-com patible w ith the IDT72V261/72V271 and the

Contextual Info: HIGH-PERFORMANCE CMOS BUFFERS IDT54/74FCT827A 1DT54/74FCT827B IDT54/74FCT827C Integrated Device Technology» Inc, FEATURES: DESCRIPTION: • Faster than AM D's Am29827 series • Equivalent to AM D’s Am29827 bipolar buffers in pinout/ function, speed and output drive over full temperature

Contextual Info: _ irr R i D E S C R IP T IO N : FEATURES: This quadruple 2-input positive-AND gate is built using advanced - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; - > 200V using machine model C = 200pF, R = 0 1,27mm pitch SOIC, 0.65mm pitch S S O P and

Contextual Info: 3.3V CMOS 20-BIT BUSINTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH162841 ADVANCE INFORMATION particularly suitable for implementing buffer registers, unidi­ rectional bus drivers, and working registers. The ALVCH162841 can be used as two 10-bit latches or

Contextual Info: 3.3V CMOS 1-BITTO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - IDT74ALVCH16344 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: IDT49FCT805/A IDT49FCT806/A FAST CMOS BUFFER/CLOCK DRIVER Integrated D evice Technology, Inc. DESCRIPTION: FEATURES: ‘H eartb eat’ monitor output T h e ID T 4 9 F C T 8 0 5 /A an d ID T 4 9 F C T 8 0 6 /A are clock drivers built using advanced dual m etal C M O S technology.

Contextual Info: IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C FAST CMOS OCTAL LATCHED TRANSCEIVER Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • IDT54/74FCT543 equivalent to FAST speed The IDT54/74FCT543/A/C is a non-inverting octal trans­ ceiver built using an advanced dual metal CMOS technology.

Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1,27mm pitch SOIC, 0.65mm pitch SSOP,