ALVCH162841 Search Results

Contextual Info: 3.3V CMOS 20-BIT BUSINTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH162841 ADVANCE INFORMATION particularly suitable for implementing buffer registers, unidi­ rectional bus drivers, and working registers. The ALVCH162841 can be used as two 10-bit latches or

Contextual Info: 3.3V CMOS 20-BIT BUSINTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD particularly suitable for implementing buffer registers, unidi­ rectional bus drivers, and working registers. The ALVCH162841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type

ALVC16841

Abstract: IDT74ALVC16841 IDT74ALVCH162841 IDT74ALVCH16841
Contextual Info: 3.3V CMOS 20-BIT TRANSPARENT LATCHES IDT74ALVCH16841 ALVCH162841 IDT74ALVC16841 ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Common features: – 0.5 MICRON CMOS Technology – Typical tSK o (Output Skew) < 250ps

IDT74ALVCH162841

Abstract: SO56-2
Contextual Info: ALVCH162841 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE ALVCH162841 ADVANCE INFORMATION 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: ance loads. This device is particularly suitable for implementing buffer

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

IDT74ALVCH162841

Abstract: SO56-2
Contextual Info: ALVCH162841 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE ALVCH162841 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: ance loads. This device is particularly suitable for implementing buffer

IDT74ALVCH162841

Contextual Info: ALVCH162841 3.3V CMOS 20-BIT BUS-INTERACE D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: ALVCH162841 DESCRIPTION: • 0.5 MICRON CMOS Technology

tl 4226 G

Contextual Info: 3.3V CMOS 20-BIT TRANSPARENT LATCHES IDT74ALVCH16841 ALVCH162841 IDT74ALVC16841 ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: The ALVCH16841 20-bit transparent transparent D-type latches are built using advanced dual metal CMOS technol­

Contextual Info: 3.3V CMOS 20-BIT T RANS PA RENT LATCHES IDT74ALVCH1 6841 IDT74ALVCH1 62841 IDT74ALVC1 6841 ADVANCE INFORMATION FEATURES: DESCRIPTION: • C o m m o n feat ur es: The ALVCH16841 20-bit transparent transparent D-type latches are built using advanced dual metal CMOS technol­

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUT­ PUTS AND BUS-HOLD FEATURES: - 0.5 MICRON CMOS Technology - Typical - ESD > 2000V per MIL-STD-883, Method 3015; - 0.635mm pitch S SO P, 0.50mm pitch T SSO P, tsK o (Output Skew) < 250ps > 200V using machine model (C = 200pF, R = 0)