DS32103 Search Results

SOT353 JC

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments 3-state output. The output enters a high impedance state when a Top View ( Top View ) The 74LVC1G126 is a single non-inverting buffer/bus driver with a OE 1 5 V CC OE A 2 A LOW-level is applied to the output enable (OE) pin. The device is

Contextual Info: DISCONTINUED A Product Line of Diodes Incorporated DMN4027SSS ADVANCE INFORMATION 40V N-CHANNEL ENHANCEMENT MODE MOSFET Product Summary V BR DSS 40V Features and Benefits RDS(on) • ID TA = 25C 27m @ VGS= 10V 8.0A 47m @ VGS= 4.5V 6.1A Low on-resistance

E12-E1

Abstract: VM MARKING CODE SOT353
Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments with a 3-state output. The output enters a high impedance Top View ( Top View ) The 74LVC1G126 is a single non-inverting buffer/bus driver OE 1 5 V CC OE A 2 A V CC state when a LOW-level is applied to the output enable (OE)

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G126 is a single non-inverting buffer/bus Top View (Top View) driver with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G126 is a single non-inverting buffer/bus driver Top View with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output enable (OE)

A115-A

Abstract: DFN1410 74LVC1G126
Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G126 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance OE 1 A 2 5 Vcc 4 Y state when a LOW-level is applied to the output enable (OE)

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments 3-state output. The output enters a high impedance state when a Top View ( Top View ) The 74LVC1G126 is a single non-inverting buffer/bus driver with a OE 1 5 V CC OE A 2 A LOW-level is applied to the output enable (OE) pin. The device is

74LVC1G126

Abstract: A115-A
Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G126 is a single non-inverting buffer/bus driver Top View with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output enable (OE)

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G126 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output enable OE pin. The device is

N4027SS

Abstract: N4027 DMN4027SSS
Contextual Info: A Product Line of Diodes Incorporated DMN4027SSS ADVANCE INFORMATION 40V N-CHANNEL ENHANCEMENT MODE MOSFET Product Summary V BR DSS Features and Benefits RDS(on) • ID TA = 25°C 27mΩ @ VGS= 10V 8.0A 47mΩ @ VGS= 4.5V 6.1A 40V Low on-resistance • Fast switching speed

Contextual Info: A Product Line of Diodes Incorporated DMN4027SSS ADV AN CE I N FORM AT I ON 40V N-CHANNEL ENHANCEMENT MODE MOSFET Features and Benefits Product Summary V BR DSS RDS(on) • ID TA = 25°C 27mΩ @ VGS= 10V 8.0A 47mΩ @ VGS= 4.5V 6.1A 40V Low on-resistance •

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G126 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output enable OE pin. The device is

74LVC1G

Contextual Info: 74LVC1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G126 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance OE 1 state when a LOW-level is applied to the output enable (OE)