DS100525 Search Results

DS1868

Abstract: LM 4440 AUDIO AMPLIFIER CIRCUIT DS1230y-200 battery date codes circuit diagram laptop motherboard Scans-049 texas instrument catalog 74ls DS1666-50 st c031 s1040 diode
Contextual Info: S ystem E x t e n s i o n Data Book CPU Supervisors Digital Potentiometers Silicon Timed Circuits Thermal Products DALLAS SEMICONDUCTOR Copyright 1994 Dallas Semiconductor Corporation, Dallas, Texas All Rights Reserved. Circuit diagrams are included to illustrate typical semiconductor applications. Complete information sufficient for

Contextual Info: RF3858 RF3858ISM Band Transmit/Receive Module with Diversity Transfer Switch ISM BAND TRANSMIT/RECEIVE MODULE WITH DIVERSITY TRANSFER SWITCH GND LNA OUT GND LNA VCC 31 30 29 28 27 LNA VREF 2 Input Match LNA SEL 26 VRX2 25 VRX1 3 24 ANT1 RX SWITCH 4 23 ANT2

74LS

Abstract: DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S
Contextual Info: DS 1005 DALLAS r DS1005 5-Tap Silicon Delay Line s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • All-silicon time delay IN 1 14 ] Vcc IN £ 1 16 H VCC NC 2 13 ] NC NC C 2 15 n NC C 3 14 H NC NC 3 12 TAP 2 C 4 13 H TAP 1 • Stable and precise over temperature and voltage

Contextual Info: DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC • Stable and precise over temperature and voltage range TAP 2

Contextual Info: DS1005 DALLAS DS1005 5-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN DESCRIPTION • All-silicon time delay • 5 taps equally spaced itC 1 14 ] V c c nc£ 2 13 3 12 ]]TAP 1 TAP 4 Ü Delay tolerance +/- 2 ns or +/- 2%, whichever ncQ is greater

Contextual Info: RF6525 Preliminary 3.0V TO 4.2V, 2.4GHz FRONT-END MODULE     NC 15 VCC TX Output Power: 22dBm TX Gain: 28dB RX Gain: 11.5dB RX NF: 2.5dB Integrated LNA With Bypass Mode VCC_BAIS  TXCT Features GND Package Style: QFN, 20-Pin, 3.5mmx3.5mmx0.5mm

74LS

Abstract: DS1005 DS1005-100 DS1005-125 DS1005-150 DS1005-75 DS1005M DS1005S delay line 400ns
Contextual Info: DALLAS SEMICO ND UCTOR CORP OTE D | 2bl4130 □□□2074 b | T-47-13 ^ Dallas Semiconductor 5 TAP SILICON DELAY LINE 31 FEATURES DS1005 14-Pin DIP DS1005M 8-Pin DIP DS1005S 16-Pin SOIC PIN CONNECTIONS • All silicon time delay . • 5 TAPS equally spaced. Delay

74LS

Abstract: DS1005 DS1005-60 DS1005G DS1005H DS1005K DS1005M DS1005S
Contextual Info: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN • 5 taps equally spaced • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage range • Leading and trailing edge accuracy

DS1005-60

Abstract: 74LS DS1005 DS1005-100 DS1005-125 DS1005-150 DS1005-175 DS1005-75 DS1005M DS1005S
Contextual Info: DS1005 5-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 5 taps equally spaced Delay tolerance ±2 ns or ±3%, whichever is greater Stable and precise over temperature and voltage range Leading and trailing edge accuracy Economical Auto-insertable, low profile

6V-0-6V

Abstract: precision waveform generator hy 214 74LS DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M
Contextual Info: DS1005 DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced IN 1 14 Vcc IN 1 16 VCC NC 2 13 NC NC 2 15 NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC 3 12 TAP 1 TAP 2 4 11 NC NC 5 10 TAP 3

Contextual Info: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay C1 c2 NC [ 3 TAP 2 c4 NC [ 5 TAP 4 [ 6 GND [ 7 IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage

Contextual Info: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN [ • 5 taps equally spaced NC [ C 1 14 3 Vcc IN C 1 2 13 ] NC NC £ 2 3 12 ] TAP1 4 11 10 ] TAPS NC C 3 • Delay tolerance ± 2 ns or ±3%, whichever is greater

Contextual Info: DALLAS SEMICONDUCTOR CORP OTE D | 2 L 1 4 130 □□□2074 L | T-47-13 Semiconductor 8^? 5Dallas TAP SILICON DELAY LINE FEATURES DS1005 14-Pin DIP DS1005M 8-Pin DIP DS1005S 16-Pin SOIC PIN CONNECTIONS • All silicon time delay Q 1 8 □ Vcc TAP 2 ^ 2 7 □TAP 1

Contextual Info: D S 1005 DALLAS SEMICONDUCTOR FEATURES DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced Vcc IN □ 1 16 □ Vcc NC NC □ 2 15 □ NC 3 14 4 13 □ TAP 1 5 12 6 7 11 □ TAP 3 10 □ NC 8 9 □ TAP 5 E TAP 2 E

Contextual Info: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN • 5 taps equally spaced [_ 1 NC [ • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage

74LS

Abstract: DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S
Contextual Info: DS1005 DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced IN 1 14 Vcc IN 1 16 VCC NC 2 13 NC NC 2 15 NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC 3 12 TAP 1 TAP 2 4 11 NC NC 5 10 TAP 3

Contextual Info: DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNM ENT FEATURES • All-silicon time delay IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or +3%, whichever is greater NC TAP 2 • Stable and precise over tem perature and voltage range