DS1003 Search Results

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M R3000
Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision • Preserves input symmetry

Contextual Info: DS1003 DALLAS SEMICONDUCTOR 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay IN • Four delayed clock phases from input NC • Input frequency independent NC • Precise tap-to-tap delays NC TAP 3 • Leading and trailing edge precision

16x2-bit

Abstract: LAMXO2280
Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.3_Auto December 2006 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

TN1087

Abstract: FTBGA 256
Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.5_Auto August 2007 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

DS1669-100

Abstract: TQFP 100 pin Socket 4 pin dip switch DS2401 PACKAGE 16 pin DIP socket DS1804 NV 2 pin dip switch ds1232(ind) data sheet ds1642-150 DS1620S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC 14–Pin DIP

PB4A-2

Abstract: AEC-Q100 DS1003 LVCMOS25 LVCMOS33 package 256-FTBGA
Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.5, November 2007 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003G DS1003H DS1003M OMT software
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR 4-Tap Silicon Delay Line for RISC Applications PIN ASSIGNMENT FEATURES • All-silicon time delay IN • Four delayed clock phases from input NC • Input frequency independent NC • Precise tap-to-tap delays NC • Leading and trailing edge precision

ic DS2430

Abstract: ds1205v DS1640
Contextual Info: M E C H A N IC A L D R A W IN G S 8 - TO 28-PIN DIP 300 MIL Includes: DS1000 DS1000M DS1003 DS1003M DS1004M DS1005 DS1005M DS1007 DS1010 DS1012M DS1013 DS1013M DS1020 DS1033M DS1035M DS1040M DS1044 DS1045 DS1200 DS1206 DS1210 8-PIN PKG 10-PIN 14-PIN 16-PIN

Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • All-silicon time delay [ 1 NC [ 2 NC C 3 NC [ 4 TAP 3 C5 NC [ 6 GND [ 7 IN • Four delayed clock phases from input • Input frequency independent

PL14C

Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.4_Auto February 2007 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

DS1669 equivalent

Abstract: DS2011D DS2013 DS1228 DS1666 74F04 DS1640 DS1003-16 DS1003-20 DS1003-33
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M R3000
Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision • Preserves input symmetry

"Direct Replacement"

Abstract: D919 DS1003 DS1003-16 DS1003M-16 DS1003M-25 Direct Replacement TEXAS
Contextual Info: DALLAS SEMICONDUCTOR 4401 South Beltwood Parkway Dallas, Texas 75244-3292 972 371-4000 Date: May 11th, 1999 Subject: PRODUCT CHANGE NOTICE – D91901 Description: Product Obsolescence – DS1003 4-Tap Silicon Delay Line for RISC Applications Description of Change:

PT8E

Abstract: PR11D MachXO sysIO Usage Guide PB4A-2 PT4E AEC-Q100 DS1003 LVCMOS25 LVCMOS33 PR15A
Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.5, November 2007 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon time delay IN • Four delayed clock phases from input NC • Input frequency independent NC • Precise tap-to-tap delays NC • Leading and trailing edge precision

Contextual Info: LA-MachXO Automotive Family Data Sheet DS1003 Version 01.2_Auto November 2006 LA-MachXO Automotive Family Data Sheet Introduction April 2006 Data Sheet DS1003 Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

cen 496

Abstract: DS1868 DS1000H DS1205V DS1640
Contextual Info: M E C H A N IC A L D R A W IN G S 8 - TO 28-PIN DIP 300 MIL mr~ i r~ i i— i nn n n Includes: DS1000 DS1000M DS1003 DS1003M DS1004M DS1005 DS1005M DS1007 DS1010 DS1012M DS1013 DS1013M DS1020 DS1033M DS1035M DS1040M DS1044 DS1045 DS1200 DS1206 DS1210 PKG

54AC378

Abstract: AC174 AC378 J16A
Contextual Info: 54AC378 Parallel D Register with Enable General Description Features The AC378 is a 6-bit register with a buffered common Enable. This device is similar to the AC174, but with common Enable rather than common Master Reset. n n n n n Logic Symbols Pin Descriptions

DS1640

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS1227 Kickstarter Chip PIN ASSIGNMENT • Provides step-up regulation and m icroenergy m anagem ent for battery-operated systems VC C02Q • Converts +3V to +6V DC input power source to +5V DC out for system power • “Kickstarts” system power upon detection of external

Contextual Info: Advance Technical Information HiperFETTM Power MOSFET Q3-Class VDSS ID25 IXFN44N100Q3 RDS on trr = = ≤ ≤ 1000V 38A Ω 220mΩ 300ns N-Channel Enhancement Mode Fast Intrinsic Rectifier miniBLOC E153432 S Symbol Test Conditions Maximum Ratings VDSS TJ = 25°C to 150°C

Contextual Info: Advance Technical Information High Voltage IGBT VCES = 2500V IC90 = 65A VCE sat ≤ 2.9V MMIX1G75N250 For Capacitor Discharge Applications ( Electrically Isolated Tab) C G Symbol Test Conditions Maximum Ratings VCES VCES TJ = 25°C to 150°C TJ = 25°C to 150°C, RGE = 1MΩ

Contextual Info: Advance Technical Information TrenchPTM Power MOSFET VDSS ID25 IXTR210P10T RDS on = = ≤ -100V -158A Ω 8mΩ P-Channel Enhancement Mode Avalanche Rated Fast Intrinsic Rectifier ISOPLUS247 E153432 Symbol Test Conditions Maximum Ratings VDSS TJ = 25°C to 150°C

Contextual Info: Preliminary Technical Information High Voltage, BiMOSFETTM Monolithic Bipolar MOS Transistor VCES = 3000V IC110 = 24A VCE sat ≤ 3.0V IXBF42N300 (Electrically Isolated Tab) Symbol Test Conditions ISOPLUS i4-PakTM Maximum Ratings VCES TC = 25°C to 150°C

G50N60

Contextual Info: Preliminary Technical Information High-Gain IGBT w/ Diode VCES = 600V IC110 = 21A VCE sat ≤ 2.50V IXGJ50N60C4D1 (Electrically Isolated Tab) High-Speed PT Trench IGBT ISO TO-247TM E153432 Symbol Test Conditions Maximum Ratings VCES VCGR TJ = 25°C to 150°C