DS100267 Search Results

DS100267 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
IXFZ140N25T Contextual Info: Advance Technical Information IXFZ140N25T GigaMOSTM HiperFETTM Power MOSFET VDSS ID25 RDS on ≤ ≤ trr (Electrically Isolated Tab) N-Channel Enhancement Mode Avalanche Rated Fast Intrinsic Diode 250V 100A Ω 17mΩ 200ns DE475 Test Conditions Maximum Ratings	Original	IXFZ140N25T 200ns DE475 5-10-A IXFZ140N25T	PDF
Contextual Info: Advance Technical Information GigaMOSTM HiperFETTM Power MOSFET VDSS ID25 IXFZ140N25T RDS on ≤ ≤ trr (Electrically Isolated Tab) N-Channel Enhancement Mode Avalanche Rated Fast Intrinsic Diode 250V 100A Ω 17mΩ 200ns DE475 D D D G Symbol Test Conditions	Original	IXFZ140N25T 200ns DE475 5-10-A	PDF
Contextual Info: 54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop Simultaneous LOW on CD and SD makes both Q and Q General Description The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock	Original	54AC109 54ACT109 ACT109 ACT74 54ACT109FM-MLS AN-925:	PDF
89551 Abstract: 54AC109 54ACT109 AC109 ACT74 DS100267 Contextual Info: 54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop Simultaneous LOW on CD and SD makes both Q and Q General Description The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock	Original	54AC109 54ACT109 ACT109 ACT74 89551 54AC109 54ACT109 AC109 DS100267	PDF