DRW43 Search Results

72T36125

Abstract: IDT72T36105 IDT72T36115 IDT72T36125 IDT72T3645 IDT72T3655 IDT72T3665 IDT72T3675 IDT72T3685 IDT72T3695
Contextual Info: PRELIMINARY 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS IDT72T3645, IDT72T3655, IDT72T3665, IDT72T3675, IDT72T3685, IDT72T3695, IDT72T36105, IDT72T36115, IDT72T36125 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36

IDT72T3645

Abstract: 72T36125
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:

IDT82V8313

Abstract: MX12 MX23 mux E1
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 6 September 25, 2009 6024 Silver Creek Valley Road, San Jose, CA 95138 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 284-2775 Printed in U.S.A. 2009 Integrated Device Technology, Inc DISCLAIMER

Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 2 March 15, 2004 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2004 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

diode in40

Abstract: Diode Mark ON B14 Q127 xn13
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767  Total Available Memory = 5,242,880 bits

CLK12

Abstract: IDT82V8313 MX12 MX23 GR 733 512 CJ3
Contextual Info: 3.3 VOLT M13 MULTIPLEXER IDT82V8313 Version 1 December 15, 2003 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • • FAX: (408) 492-8674 Printed in U.S.A. 2003 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51749  Total Available Memory = 1,179,648 bits

FIFO16

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS PRELIMINARY 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 FEATURES: • • • • • • • • • • • • • • • Choose among the following memory organizations: IDT72T7285  16,384 x 72

72T36125

Contextual Info: PRELIMINARY 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS IDT72T3645, IDT72T3655, IDT72T3665, IDT72T3675, IDT72T3685, IDT72T3695, IDT72T36105, IDT72T36115, IDT72T36125 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51339  Total Available Memory = 589,824 bits

TAA 611 T12

Abstract: x48 chipset IDT72T6360 IDT72T6480 D25N3
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

IDT72T36105

Abstract: IDT72T36115 IDT72T36125 IDT72T3645 IDT72T3655 IDT72T3665 IDT72T3675 IDT72T3685 IDT72T3695 2Kx36
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:

XN07

Abstract: Q127 wd2m
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 40 BIT WIDE CONFIGURATION IDT72P51767 IDT72P51777 5,242,880 bits 10,485,760 bits FEATURES • • • • • • • • • • • • Choose from among the following memory density options: IDT72P51767 ⎯ Total Available Memory = 5,242,880 bits

72T7285

Abstract: 72T7295 IDT72T72105 IDT72T72115 IDT72T7285 IDT72T7295 72T72105
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS IDT72T7285, IDT72T7295, IDT72T72105, IDT72T72115 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 FEATURES: • • • • • • • • • • • • • • • Choose among the following memory organizations:

PAE2-R13

Abstract: IDT72T51436 IDT72T51446 IDT72T51456
Contextual Info: PRELIMINARY IDT72T51436 IDT72T51446 IDT72T51456 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • • Choose from among the following memory density options:

Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits 4,718,592 bits • FEATURES • • • • • • • • • Choose from among the following memory density options: IDT72P51339  Total Available Memory = 589,824 bits

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag

Diode Mark ON B14

Abstract: Q127 T6714
Contextual Info: 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES 128 QUEUES 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits FEATURES • • • • • • • • • • Choose from among the following memory density options: IDT72P51749  Total Available Memory = 1,179,648 bits

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS PRELIMINARY 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 FEATURES: • • • • • • • • • • • • • • • Choose among the following memory organizations: IDT72T7285  16,384 x 72

VREF02

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS PRELIMINARY 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 FEATURES: • • • • • • • • • • • • • • • Choose among the following memory organizations: IDT72T7285  16,384 x 72

72T36125

Contextual Info: PRELIMINARY 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS IDT72T3645, IDT72T3655, IDT72T3665, IDT72T3675, IDT72T3685, IDT72T3695, IDT72T36105, IDT72T36115, IDT72T36125 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS IDT72T7285, IDT72T7295, IDT72T72105, IDT72T72115 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 • FEATURES: • • • • • • • • • • • • • • Choose among the following memory organizations:

TAA 611 T12

Abstract: 72T6480 BA1-B11 d25n3 BA0-C11 k4h561638f A11-C10 q35t Q35T1 A7D9
Contextual Info: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag