DOUBLE WINDOW Search Results

COACH 11

Contextual Info: Analyzing a Sample INPRISE * JBuilder* 2 Application Using the VTune Performance Analyzer 4.0 int i; long startTime, endTime; double dk[] = new double [3000]; double dx[] = new double [3000]; double dy[] = new double [3000]; double dz[] = new double [3000];

K7Z327285M

Contextual Info: K7Z327285M Preliminary 512Kx72 DLW Double Late Write RAM Document Title 512Kx72 DLW(Double Late Write) RAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial document. 1. Device name change from Double Late Write SigmaRAM to Double Late Write RAM

Contextual Info: METALLIZED POLYPROPYLENE DOUBLE METALLIZED MP88R - Radial Box MP88D - Radial Epoxy Dipped MP880 - Axial Oval MP88 - Axial Round FEATURES: METALLIZED POLYPROPYLENE DOUBLE METAL • ■ ■ ■ APPLICATIONS: Extended double sided metallized film Non-Inductive construction

ZJY-M4A

Abstract: tdk zjy-M4A ISO7816-3 PDIUSBD12 TDA8008 AN00010 PDIUSBD12 schematic USB Smart Card Reader "USB reader"
Contextual Info: APPLICATION NOTE TDA8008 Mask D06 DOUBLE USB SMART CARD READER AN/00010 Philips Semiconductors Application Note AN00010 TDA8008H mask D 06 Double usb smart card reader ABSTRACT This document describes the software specifications that have been developed for the double USB smart

V23084-C2001-A303

Abstract: v23084 V23084-C2002-A303 V23084-C2001-A403 V23084-C2002-A403 Tyco* V23084 Tyco v23084-c2001-a303 v23084-c2001-a303 tyco v23084c2001 V23084-C2002
Contextual Info: Automotive Relays PCB Double Relays Double Mini Relay DMR n Limiting continuous current 30 A Typical applications Car alarm, door control, door lock, immobilizer, seat control, sun roof, window lifter, wiper control. F084_fcw2c_bw Contact arrangement 2 form C, 2 CO

v23084

Abstract: V23084-C2001-A303 V23084-C2001-A403 V23084-C2002-A403 V23084-C2002-A303 Tyco* V23084 Tyco v23084-c2001-a303 12vdc motor immobilizer for alarm relay V23084-C2001-A303
Contextual Info: Automotive Relays PCB Double Relays Double Mini Relay DMR Q Q Limiting continuous current 30 A Easiest PCB routing among all PCB relays Typical applications Car alarm, door control, door lock, immobilizer, seat control, sun roof, window lifter, wiper control.

smart card tda8004

Abstract: tda 8052 TDA 7816 iso7816 Smart Cards Reader tda8006 smart card programming 80C52 ISO7816-3 MAX232C TDA8004 TDA8006
Contextual Info: APPLICATION NOTE TDA8006 mask n°12 DOUBLE SMART CARD READER USING TDA8006 AND TDA8004 INTERFACES AN /97074 Philips Semiconductors TDA8006 mask n°12 Double smart card reader using TDA8006 and TDA8004 Application Note AN97074 ABSTRACT This document describes the software specifications that have been developped for the double

three phase sine wave pwm circuit

Abstract: ADMC300 AN300-03 space-vector PWM pwm sinewave INVERTER
Contextual Info: a Double Update Mode of PWM Generation Unit of the ADMC300 AN300-02 a Double Update Mode of PWM Generation Unit of the ADMC300 AN300-02 Analog Devices Inc., January 2000 Page 1 of 9 a Double Update Mode of PWM Generation Unit of the ADMC300 AN300-02 Table of Contents

ADMC331

Abstract: ON AH AN331-02 space-vector PWM three phase sine wave pwm circuit AN331-03 pwm sinewave INVERTER
Contextual Info: a Double Update Mode of PWM Generation Unit of the ADMC331 AN331-02 a Double Update Mode of PWM Generation Unit of the ADMC331 AN331-02 Analog Devices Inc., January 2000 Page 1 of 9 a Double Update Mode of PWM Generation Unit of the ADMC331 AN331-02 Table of Contents

ADMC401

Abstract: an401-03 pwm sinewave INVERTER AN401
Contextual Info: a Double Update Mode of PWM Generation Unit of the ADMC401 AN401-02 a Double Update Mode of PWM Generation Unit of the ADMC401 AN401-02 Analog Devices Inc., January 2000 Page 1 of 9 a Double Update Mode of PWM Generation Unit of the ADMC401 AN401-02 Table of Contents

46LR16200C

Abstract: Mobile DDR SDRAM 43LR16200C
Contextual Info: IS43LR16200C 1M x 16Bits x 2Banks Mobile DDR SDRAM Description The IS43LR16200C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 1,048,576 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

Mobile DDR SDRAM

Abstract: 43LR32100C IS43LR32100C
Contextual Info: IS43LR32100C Advanced Information 512K x 32Bits x 2Banks Mobile DDR SDRAM Description The IS43LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

IRC5

Contextual Info: TC59LM913/05AMG-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 8,388,608-WORDS x 4 BANKS × 16-BITS DOUBLE DATA RATE FAST CYCLE RAM 16,777,216-WORDS × 4 BANKS × 8-BITS DOUBLE DATA RATE FAST CYCLE RAM DESCRIPTION TC59LM913/05AMG is a CMOS Double Data Rate Fast Cycle Random Access Memory DDR-FCRAMTM

Contextual Info: TC59LM814/06CFT-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS DOUBLE DATA RATE FAST CYCLE RAM 8,388,608-WORDS × 4 BANKS × 8-BITS DOUBLE DATA RATE FAST CYCLE RAM DESCRIPTION TC59LM814/06CFT are a CMOS Double Data Rate Fast Cycle Random Access Memory DDR FCRAMTM

46LR16200C

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16200C 1M x 16Bits x 2Banks Mobile DDR SDRAM Description The IS43/46LR16200C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 1,048,576 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

Contextual Info: IS43LR16200C Advanced Information 1M x 16Bits x 2Banks Mobile DDR SDRAM Description The IS43LR16200C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 1,048,576 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

Contextual Info: I S43LR32100C Advanced Information 512K x 32Bits x 2Banks Mobile DDR SDRAM Description The IS43LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

46LR32100C

Abstract: Mobile DDR SDRAM 43LR32100C
Contextual Info: IS43LR32100C IS46LR32100C 512K x 32Bits x 2Banks Mobile DDR SDRAM Description The IS43/46LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

Contextual Info: TC59LM814/06CFT-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS DOUBLE DATA RATE FAST CYCLE RAM 8,388,608-WORDS × 4 BANKS × 8-BITS DOUBLE DATA RATE FAST CYCLE RAM DESCRIPTION TC59LM814/06CFT are a CMOS Double Data Rate Fast Cycle Random Access Memory DDR FCRAMTM

Contextual Info: I S43LR16200C Advanced Information 1M x 16Bits x 2Banks Mobile DDR SDRAM Description The IS43LR16200C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 1,048,576 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

satellite tuner sharp

Abstract: sharp lnb sharp rf tuners bsf* satellite tuner BSFR53G03 BSFR53G06 BSFR53G07 BSFZ57G05 0438 BSFZ
Contextual Info: PRODUCT INFORMATION BSFR/Z-Series Double Conversion IF Output Satellite Tuner NEW HIGH PERFORMANCE DOUBLE CONVERSION TUNERS FEATURING PRESCALER CAPABILITY. APPLICATIONS: • Satellite receiver • Data receiver RF Components Group STANDARD BSFR PACKAGE

Contextual Info: ^ 1-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-W 0RDSX4BANKSX16-BITS DOUBLE DATA RATE FAST CYCLE RAM 8,388,608-WORDSX4BANKSX8-BITS DOUBLE DATA RATE FAST CYCLE RAM

v23084

Abstract: A303 Tyco* V23084 relay v23084 A403 IEC 68-2-6 Vibration V23084-S relay A303 mini relays relay v23084 A303 ECR1650-B
Contextual Info: Twin relays Double mini relays DMR and DMR-S Powertrain Systems Chassis Systems Safety Security Body Driver Information Convenience Features - Two separate systems - Lamp applications - Extremely space saving double relay - Silent version available DMR-S

Contextual Info: EM42CM1684RTA Revision History Revision 0.1 Jan. 2012 - First release. www.eorex.com Jan. 2012 1/22 EM42CM1684RTA 1Gb (16Mx4Bank×16) Double DATA RATE SDRAM Features Description • Internal Double-Date-Ratearchitecture with twice accesses per clock cycle.