DNA 1001 Search Results

TMS320C6201 crystal

Abstract: interface mcbsp and codec spru190d C6000 CS4231A CS4235 SN74CBTD3384 TMS320C6000 TMS320C6201
Contextual Info: Application Report SPRA477A - August 2001 TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec Interface Brian G. Carlson and Vassos Soteriou DNA Enterprises, Inc. – Texas Instruments ABSTRACT This application note describes how a multimedia audio codec can be interfaced to the

CS4231A

Abstract: audio transistor 274 to-3 interface mcbsp and codec SN74CBTD3384 TMS320C6000 TMS320C6201
Contextual Info: Application Report SPRA477 TMS320C6000 McBSP Interface to the CS4231A Multimedia Audio Codec Brian G. Carlson DNA Enterprises, Inc. Abstract This application note describes how the CS4231A multimedia audio codec can be interfaced to the TMS320C6201 DSP. The codec’s digital audio data can be directly

en132400 560-2

Abstract: IEC384-14 bs415 capacitor 560-2 LL2 EN132400 Y1-250V 560-2 LL2 ECKDNS103ME ECKDNS223ZV EN132 400 560-2 LL2 nsb Y2-CAPACITOR
Contextual Info: Ceramic Disc Capacitors Type NS-A Ceramic Disc Capacitors for Safety Regulations Safety Reg. NS ECK-DNA/DNB Type: NS-A • Features • Type NS-A, a revised type designation from our previous type designation of NS for “Class II equipment,” is recognized and classified as SubClass Y1 Capacitor according to IEC384-14 2nd

F100K

Contextual Info: 100304 Low Power Quint AND/NAND Gate General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. n n n n n 2000V ESD protection Pin/function compatible with 100104

100155DC

Contextual Info: 100155 National SjA Semiconductor F100155 Quad Multiplexer/Latch General Description The F100155 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in

LT 7202

Abstract: LT 7206 955 100 12 LAO 100171F 100171Y L 7206 LT 7203 LT 7207
Contextual Info: 100171 Signetics Multiplexer Triple 4-Input Multiplexer Product Specification ECL Products DESCRIPTION The 100171 is a Triple 4-input Multiplex­ er fed by 2 common address inputs, with true and complementary data o u tp u ts .^ HIGH state on the Enable Input E

F100155

Abstract: F100355 qd223 966-03
Contextual Info: 100155 National SLA Semiconductor F100155 Quad Multiplexer/Latch General Description T h e F 1 0 01 55 co ntains four transparent latches, e ach o l w hich can a cc e p t and store data from two sources. W hen both E n a b le E„ inputs are LO W , the data that a p p e a rs at

Contextual Info: 100104 O T National ÆM Semiconductor F100104 Quint AND/NAND Gate General Description The F100104 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate out­ puts. All inputs have 50 k il pull-down resistors. Refer to the F100304 datasheet for:

858C

Abstract: F100155 F100355 qd223
Contextual Info: 100155 Ggl National SLA Semiconductor F100155 Quad Multiplexer/Latch General Description The F100155 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at

F100104

Abstract: F100304
Contextual Info: 100104 National ÆjA Semiconductor F100104 Quint AND/NAND Gate General Description Refer to the F100304 datasheet for: P C C packaging Lower power Military versions Extended voltage sp e cs - 4 .2 V to -5 .7 V T he F100104 is monolithic quint A N D /N A N D gate. The

100355PC

Abstract: 100355QC 100355QI MO-047 MS-011 N24E V28A
Contextual Info: nU'y 1 9 ! 9November M K i1999 coo Revised Low General Description Features The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at • Greater than 40% power reduction of the 100155

Contextual Info: * QUAD MULTIPLEXER/LATCH SYNERGY SY100S355 S E M IC O N D U C T O R FEATURES DESCRIPTION • Max. propagation delay of 110Ops ■ Max. enable to output delay of 1400ps ■ I e e min. of -80m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels

b1565

Abstract: B1565 transistor B1095 C1995 F100K J24E N24E V28A W24C
Contextual Info: 100355 Low Power Quad Multiplexer Latch General Description Features The 100355 contains four transparent latches each of which can accept and store data from two sources When both Enable En inputs are LOW the data that appears at an output is controlled by the Select (Sn) inputs as shown in

F100K

Contextual Info: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or

SY100S355

Abstract: SY100S355DC SY100S355FC SY100S355JC
Contextual Info: This Material Copyrighted By Its Respective Manufacturer * SYNERGY SY100S355 B L O C K D IA G R A M T R U T H T A B L E '1' Inputs Outputs MR El E2 Si So Dix Dox Qx Qx H L L L X X X X X L L L L L L H H L H H L H L X X X X H H L H L L H L H L L L L L L L L

100355PC

Abstract: 100355QC 100355QI MO-047 MS-011 N24E V28A
Contextual Info: Revised November 1999 100355 Low Power Quad Multiplexer/Latch General Description Features The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at

Contextual Info: 100355 £9 National Semiconductor 100355 Low Power Quad Multiplexer/Latch General Description Features The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at

D2E diode smd

Abstract: smd D2E diode SMD D1A SMD d2c F100K J24E W24B
Contextual Info: 100304 Low Power Quint AND/NAND Gate General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection Pin/function compatible with 100104

F100K

Contextual Info: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or

Contextual Info: 100104 National Semiconductor F100104 Quint AND/NAND Gate General Description Refer to the F100304 datasheet for: PCC packaging Lower power Military versions Extended voltage specs - 4 .2 V to -5 .7 V The F100104 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate out­

DNA 1001

Abstract: 0xE0000003 Alcatel "System 12" sr 18751 16812 oki 160SC-LS ProLiant 17805 DTI/240SC connector ptr
Contextual Info: System Release 5.0 for Windows Release Update 05-1477-002 Copyright Notice Copyright 2000 Dialogic Corporation. All Rights Reserved. All contents of this document are subject to change without notice and do not represent a commitment on the part of Dialogic Corporation. Every effort is made to ensure the accuracy of this information. However,

Contextual Info: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or

ECL 100304

Contextual Info: 100304 Low Power Quint AND/NAND Gate General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection Pin/function compatible with 100104

Contextual Info: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or