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    DN74L Search Results

    DN74L Datasheets (480)

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    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    DN74LS
    Unknown Shortform IC and Component Datasheets (Plus Cross Reference Data) Short Form PDF 72.95KB 1
    DN74LS00
    National Semiconductor Quad 2-input Positive NAND Gate Scan PDF 45.11KB 2
    DN74LS00N
    Panasonic Quad 2-input Positive NAND Gates Scan PDF 45.12KB 2
    DN74LS00N
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 45.76KB 2
    DN74LS00S
    Panasonic Quad 2-input Positive NAND Gates Scan PDF 45.12KB 2
    DN74LS00S
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 45.76KB 2
    DN74LS01N
    Panasonic Quad 2-input Positive NAND Gates (with Open Collector Outputs) Scan PDF 44.63KB 2
    DN74LS01N
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 45KB 2
    DN74LS01S
    Panasonic Quad 2-input Positive NAND Gates (with Open Collector Outputs) Scan PDF 44.63KB 2
    DN74LS01S
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 45KB 2
    DN74LS02N
    Panasonic Quad 2-input Positive NOR Gates Scan PDF 44.67KB 2
    DN74LS02N
    Panasonic Quad 2-Input Positive NOR Gates Scan PDF 47.25KB 2
    DN74LS02S
    Panasonic Quad 2-input Positive NOR Gates Scan PDF 44.67KB 2
    DN74LS02S
    Panasonic Quad 2-Input Positive NOR Gates Scan PDF 47.25KB 2
    DN74LS03N
    Panasonic Quad 2-input Positive NAND Gates (with Open Collector Outputs) Scan PDF 43.07KB 2
    DN74LS03N
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 46.46KB 2
    DN74LS03S
    Panasonic Quad 2-Input Positive NAND Gates Scan PDF 46.46KB 2
    DN74LS03S
    Panasonic Quad 2-input Positive NAND Gates (with Open Collector Outputs) Scan PDF 43.07KB 2
    DN74LS04
    National Semiconductor Hex Inverters Scan PDF 43.38KB 2
    DN74LS04N
    Panasonic Hex Inverters Scan PDF 45.27KB 2
    ...
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    DN74L Price and Stock

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    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DN74LS166 798
    • 1 $3.96
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    • 1000 $1.49
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    Mitsubishi Electric DN74LS258A

    ELECTRONIC COMPONENT
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    Quest Components DN74LS258A 25
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    Quest Components DN74LS138N 1
    • 1 $22.89
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    Others DN74LS164N

    INSTOCK
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    Chip 1 Exchange DN74LS164N 190
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    National Semiconductor Corporation DN74LS195AN

    IN STOCK SHIP TODAY
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    Component Electronics, Inc DN74LS195AN 22
    • 1 $0.77
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    • 100 $0.58
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    DN74L Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    SO-140

    Abstract: DN74LS12
    Contextual Info: DN74LS1 2 LS TTL DN74LS Series DN74LS12 T rip le 3 - input P o sitiv e NAND G ates with Open C ollector Outputs • Description P-1 DN 74LS12 contains three 3-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • •


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    dn74lsdn74ls1dn74ls1214-pin+2so-14dso-140 PDF

    DN74LS193

    Contextual Info: DN74LS193 LS T T L DN74LS Series D 7 N 4 L S 1 9 3 Synchronous 4 - b it Binary U p /D o w n Dual Clock Counters with R eset • Description P-2 D N 7 4 LS 1 9 3 is a synchronous hexadecim al (4-bit b in ary) up/down counter w ith direct-coupled reset input and set


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    dn74lsdn74ls19332mhz16-pin+1so-16d PDF

    DN74LS125A

    Abstract: MA161
    Contextual Info: I LS TTL DN74LS Series DN74LS125A DN74LS125A Quad Bus Buffer Gates with 3 -sta te Outputs • Description P-1 DN 74LS125A contains four 3-state o u tp u t b uffer gate circuits, each w ith independent o u tp u t-co n tro l input-C term inals. ■ Features


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    dn74lsdn74ls125dn74ls125a14-pin+2so-14dma161 PDF

    DN74LS145

    Contextual Info: LS TTL DN74LS Series DN74LS145 DN74LS145 iv ^ L S ^ BCD to Decimal Decoders / Drivers P-2 • Description DN 74LS145 is a BCD to decim al decoder/ driver w ith open collector o u tp u ts. ■ Features • • • • Large o u tp u t cu rrent I o l ^ 80m A m axim um )


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    dn74lsdn74ls14516-pinso-16d PDF

    DN74LS194A

    Abstract: MA161
    Contextual Info: ! LS TTL DN74LS Series DN74LS194A DN74LS194A 4 -b it Bidirectional Universal Shift R egisters • Description P-2 DN 74LS194A is a bidirectional 4-bit serial/parallel input to serial/parallel output shift register. ■ • • • • • • Features Synchronous serial/parallel input to serial/parallel output


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    dn74lsdn74ls194a16-pinso-16d+1ma161 PDF

    DN74LS138

    Abstract: DN74LS139
    Contextual Info: LS TTL DN74LS Series DN74LS138 DN74LS138 3 -lin e to 8 -lin e Decoders / Demultiplexers • Description P-2 DN74LS138 is a 3-bit decimal to octal decoder/demulti­ plexer with enable inputs. Features Three types of enable inputs Quaternary to hexadecimal decoder/demultiplexer capa­


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    dn74lsdn74ls13816-pinso-16d+1dn74ls139 PDF

    TTL Schmitt-Trigger Inverters

    Abstract: DN74LS14
    Contextual Info: I* DN74LS14 L S T T L DN74LS Series D N 7 4 L S 1 4 Hex S ch m itt-T rigger Inverters • D e scrip tion D N 74S14 contains six inverter circuits w ith Schm itt triggers. ■ Features • • • • Ideal for w aveform shaping Low pow er consum ption P j = 50mW typical


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    dn74lsdn74ls14dn74s1414-pin+2so-14dttl schmitt-trigger inverters PDF

    DN74LS283

    Contextual Info: DN74LS Series DN74LS283 IW4LS2&3 DN74LS283 4 -b it Binary Full Adders with F ast Carry • Description P-2 D N 7 4 L S 2 8 3 is a 4-b it fu ll adder w ith a “look-ahead” carry. ■ Features • • • “ L ook-ahead” carry for high speed System capability w ith partial “look -ah ead ” carry.


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    lsttldn74lsdn74ls28316-piniso-16d+1outputs23 PDF

    MA161

    Abstract: PANASONIC T14 324 PANASONIC DEJJ
    Contextual Info: PANASONIC IN D L /E L E K -CICJ 7S De | 6 9 3 2 8 5 2 PANASONIC ^.NDL» |L E C T R 0 N I £ . LT35BS2 0 0 0 7 1 5 5 72Ç 0 7 155 LS TTL DN74LS'>U-X D P f? - 3 I DN74LS242/DN74LS242S DN74LS242/DN74LS242S Quad Bus T ransceivers w ith 3 - state Outputs •« s


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    0d071ssdn74lss/udn74ls242/dn74ls242sdn74ls242/si+8400mvdn74lss/u-xtrs15ns500nsma161panasonic t14324 panasonicdejj PDF

    T flip flop pin configuration

    Abstract: j-k flip flop clock toggle MA161 flip flop T Toggle DN74LS73 JK flip flop toggle flip flop jk delay reset flip flop
    Contextual Info: DN74LS73 LS TTL DN74LS Series DN74LS73 Dual J-K F lip -F lop s with Reset P-1 • Description DN74LS73 contains two negative-edge triggered J-K flip-flop circuit, each with independent clock CP, J, K, and directcoupled reset input terminals. ■ • •


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    dn74lsdn74ls7314-pinso-14d+7t flip flop pin configurationj-k flip flop clock togglema161flip flop t togglejk flip flop toggleflip flop jkdelay reset flip flop PDF

    DN74LS395A

    Abstract: MA161
    Contextual Info: DN74LS395A LS TTL DN74LS Series DN74LS395A 4 -b it Cascadable Shift R egisters with 3 -sta te Outputs • D escription P -2 D N 74LS395A is a 4-bit serial/parallel input to serial/parallel o u tp u t shift register w ith 3-state outputs. ■ Features •


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    dn74lsdn74ls395ama161 PDF

    DN74LS10

    Abstract: MA161
    Contextual Info: I LS TTL DN74LS Series DN74LS10 DN74LS10 T riple 3 - input P o sitiv e NAND Gates • Description D N 74LS10 contains three 3-input positive isolation NAND gate circuits. ■ Features • • • • Low pow er consum ption P,j = 6mW typical High speed ( tpd = 10ns typical)


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    dn74lsdn74ls1014-pinso-14d+1ma161 PDF

    DN74LS22

    Contextual Info: DN74LS22 LS T TL DN74LS Series DN74LS22 Dual 4 - input P o sitiv e NAND G ates with Open C ollector Outputs P-1 • Description DN 74LS22 contains tw o 4-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • • • •


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    dn74lsdn74ls2214-pinso-14d+1cl-15pf PDF

    74LS28

    Abstract: DN74LS28
    Contextual Info: DN74LS28 LS T TL DN74LS Series DN74LS28 Quad 2 -input P ositive NOR Buffers P-1 • Description DN 74L S28 contains four 2-input positive isolation N O R buffer gate circuits. ■ Features • • • • High fan-out I o l = 24m A , I o h = —1.2m A Low pow er consum ption (Pti = 22mW typical)


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    dn74lsdn74ls2874ls2814-pin+2so-14ddn74ls23 PDF

    BCD FREQUENCY METER

    Abstract: DN74LS90 MA161
    Contextual Info: DN74LS90 LS TTL DN74LS Series DN74LS90 Decade Counters P-1 • Description DN 74LS90 is an asynchronous decade counter w ith directcoupled reset in put and nine direct-coupled set input term i­ nals. ■ Features • • • Direct-coupled reset input Nine direct-coupled set inputs


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    dn74lsdn74ls9042mhz14-pin+2bcd frequency meterma161 PDF

    MT25TL512BBA8ESF-0AAT TR

    Abstract: DN74LS241 MT35XU512ABA1G12-0AAT TR
    Contextual Info: I LS TTL DN74LS Series DN74LS241 DN74LS241 Octal Buffers AND Line D rivers with 3 - s t a t e Outputs • Description P -3 D N 7 4 L S 2 4 1 c o n ta in s tw o b u ff e r b lo c k s, e a c h w ith in d e p e n d e n t o u tp u t- c o n tr o l in p u ts c o m m o n to fo u r c irc u its a n d 3 -sta te


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    dn74lsdn74ls241400mv-15ma+320-pinmt25tl512bba8esf-0aat trmt35xu512aba1g12-0aat tr PDF

    DN74LS26

    Contextual Info: I DN74LS26 LS TTL DN74LS Series DN74LS26 Quad 2 -input High-Voltage Interface P ositive NAND Gates P-1 U Description D N 74LS26 contains four 2-input positive isolation NAND b u ffer gate circuits. • Features • • • • • “ Wired” AND capability


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    dn74lsdn74ls2614-pinso-14d PDF

    DN74LS540

    Abstract: DN74LS540S 07274
    Contextual Info: PANASONIC INDL/ELEK -CIO 72 D e | ^ 3 2 0 5 2 □□□7272 S T 7 2C 0 7 2 7 2 693 2Qj52 PANASONIC IN PL» ELECTRONIC : L S T T L DN74LS$/'J-v C ü T - r Z -O? DN74LS540/DN74LS540S DN74LS540 DN74LS540S Octal B u ffers and Line D rivers with 3 - state Outputs


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    dn74ls5q7272dn74ls540/dn74ls540sdn74ls540+7dn74ls540sdn74ls540/s400mv15vft-15mah751307274 PDF

    MA161

    Abstract: umh13
    Contextual Info: PANASONIC INDL/ELEK -CIO 75 69 329 52 PANA SON IC . . , >. i , . . f „ k. . _ P E I 1^35555 0007156 7 72C 07 158 IN O L «. E LE CTR ON IC ._ . . . . . . , aJ*t«.*atjfc»*W i'Ci4ifV*siat«?MS*-' LS TTL DN74LS'>U-X D DN74LS243/DN74LS243S T- DN74LS243/DN74LS243S


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    q715fidn74lsdn74ls243/dn74ls243s74ls243/dn+874ls243sdn74ls243/si400mvf320hingtrs15ns500nsma161umh13 PDF

    TJ4D

    Abstract: DN74LS173 MA161
    Contextual Info: I DN74LS173 LS TTL DN74LS Series DN74LS173 4 -b it D-type R egisters with 3 -state Outputs P-2 • Description DN74LS173 is a 4-bit register with 3-state outputs. ■ Features • Capability for data holding irrespective o f clock pulse number • Data nondestructive during 3-state output


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    dn74lsdn74ls17316-pinso-16d+2tj4dma161 PDF

    DN74LS55

    Contextual Info: DN74LS55 LS T T L DN74LS Series DN74LS55 2-w id e 4 - input A N D -O R -INVERT Gates • D escription DN74LS55 contains two 4-input AND-OR-INVERT gates. ■ Features • • Low pow er consum ption Pd = 2.75m W typical High speed ( t pd = 12ns typical) •


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    dn74lsdn74ls55 PDF

    Diode RL 4B

    Abstract: DN74LS158 MA161
    Contextual Info: LS TTL DN74LS Series DN74LS158 DN74LS158 Quad 2 -lin e to 1 -lin e Data S electors / Multiplexers • Description P -2 D N 74LS158 contains four 2-line to 1-line data selector/ m ultiplexer circuits. ■ Features • • • • • Inverted o u tp u t C om m on enable in p u t for all fo u r circuits


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    dn74lsdn74ls15816-pinso-16d+2ma161diode rl 4b PDF

    DN74LS09

    Contextual Info: I LS TTL DN74LS Series DN74LS09 DN74LS09 Quad 2 - input P o sitiv e AND G ates with Open C ollector Outputs P -1 • Description D N 7 4 L S 0 9 c o n ta in s fo u r 2 -in p u t p o sitiv e iso la tio n A N D g ate c irc u its w ith o p e n c o lle c to r o u tp u ts .


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    dn74lsdn74ls0914-pinso-14d PDF

    DN74LS02

    Contextual Info: I LS TTL DN74LS Series DN74LS02 DN74LS02 Quad 2 - input P o sitiv e NOR G ates • Description DN74LS02 contains four 2-input positive isolation NOR gate circuits. ■ • • • • P-1 Features Low power consumption P,j = 1 lmW typical High speed ( tpd = 10ns typical)


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    dn74lsdn74ls0214-pinso-14d+1mai61 PDF