DD134 Search Results

Contextual Info: SAMSUNG ELECTRONICS INC bME D KM416C256/L/SL • 7^4142 DD1343Q Q24 I SHGK CMOS DRAM 256K x 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM416C256/USL is a CMOS high speed 262,144 bit x 16 Dynamic Random Access Memory. Its

ad7507kd

Abstract: AD7507SD AD7506SD AD7506JN 400S AD7506 AD7507 AD7507JN ad7506jd
Contextual Info: ANALOG DEVICES INC 11 AN ALO G D EV IC ES c i | DaibBOO DD1341C1 3 | ~ CMOS 8-and 16-Channel Analog Multiplexers AD7506/AD7507 FEA TU RES Rom ! 30012 Power Dissipation: 1.5mW TTL/DTL/CMOS Direct Interface . Break-Before-Make Switching Standard 28-Pin DIPs and 28-Terminal Surface

Contextual Info: SAMSUNG ELECTRONICS INC bME J> KM416C256LL Wt 7 ^ 4 1 4 2 DD134S3 b21 « S M C K CMOS DRAM 256K x 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Sam sung KM416C256LL is a CMOS high speed 262,144 b it x 16 D ynam ic Random A ccess M em ory. Its

DS1245V

Abstract: 32-PIN 34-PIN DS1245 DS1245AB DS1245Y DS1243AB-100
Contextual Info: D S 1245Y /A B DALLAS s e m ic o n d u c t o r DS1245Y/AB 1024K Nonvolatile SRAM FEATURES PIN ASSIGNM ENT * 1 0 years minimum data retention in the absence of external power 1 1 NC A16 • Data is automatically protected during power loss Í A14 • Dl P-package devices directly replace 128K x 8 vola­

Contextual Info: Panasonic CCD Area Image Sensor MN3713FE 4.5mm 1/4 inch EIS CCD Area Image Sensor •Overview ■Pin Assignments The M N3713FE is a 4.5mm (1/4 inch) Interline Transfer CCD (IT-CCD) solid state image sensor device. This device uses photodiodes in the optoelectric conversion

Contextual Info: Panasonic CCD Area Image Sensor MW3746CKH 11 mm 2/3 inch 768H CCD Area Image Sensor •Overview ■Pin Assignments The M W 3746CKH is a 11mm (2/3 inch) Interline Transfer CCD (IT-CCD) solid state image sensor device. This device uses photodiodes in the optoelectric conversion

Contextual Info: mM ITEL MH88632B Central Office Interface Circuit Preliminary Information Features ISSUE 2 • S up po rts Loop S tart and G round S tart protocols • 2-4 W ire conversion • Program m able Input Impedance, Network Balance Impedance and gains Ordering Inform ation

Contextual Info: M H 8 8 6 3 4 -2 U U MITEL Central Office Interface Circuit Preliminary Information ISSUE 4 Features • Loop Start Trunk Interface • 600Q Input Im pedance • 2-4 W ire Conversion • Line state D etection O utputs: January 1997 O rdering Inform ation M H 88634-2

ERF 2030

Abstract: ERF 2030 mos fet c455 CY7C455 CY7C456 CY7C457 CY7C447 c4556 C4557
Contextual Info: / u h *f o . iviu i l u a y , w w i u u t i r p , 1 Revision: Tuesday, December 14,1993 C Y 7C 455 C Y 7C 456 C Y 7C 457 = = ^ C Y PR K SS p r e l im in a r y 512x18, lK x 18, and 2 K x l8 Cascadable Clocked FIFOs with Programmable Flags Features Functional Description

MAX620cpn

Contextual Info: 19-4325, Rev 2; 10/94 y v i y j x i y u i Q uad, H ig h -S id e M O S F E T D riv e rs The MAX620/MAX621 are microprocessor compatible and feature undervoltage lockout capability This lockout feature inhibits the FET driver outputs until the high-side voltage reaches the proper level, as indicated by a

78q8392

Contextual Info: SSI 78Q8392L Low Power Ethernet Coaxial Transceiver SaconSvstans' A TDK Group/Company January 1996 DESCRIPTION FEATURES The SSI 78Q8392L Ethernet Transceiver is a low power BiCMOS coax line transmitter/receiver. The device includes analog transmit and receive buffers, a

2102R

Abstract: R2100R
Contextual Info: S S I 3 2 R 2 1 0 0 R /2 1 0 1 R /2102R jilicm MfatU' . xrM/ ~ 10 Channel Thin Film Read/Write Devices A TD K G ro u p fC o m p an y October 1995 DESCRIPTION FEATURES The SSI 32R2100R/2101R/2102R are BiCMOS monolithic integrated circuits designed for use with

Q01327

Abstract: 8051 midi wireless keyboard 8051
Contextual Info: GENERAL DESCRIPTION The FDC37C957FR incorporates an 8051 based keyboard controller; a Flash Interface; four PS/2 ports; real-time clock; SMC's true CMOS 765B FDC w ith advanced digital data separator and 16 byte data FIFO; tw o 16C550A compatible UARTs, the second UART

Contextual Info: n IN T E G R A T E D C IR C U IT S UC5603 UNITRODE PRELIMINARY 9-Line SCSI Active Terminator FEATURES Complies with SCSI and SCSI-2 Standards Provides Active Termination for 9 Lines Power Regulator Output Stage -300mA Sourcing Current for Termination +300mA Sinking Current for Active

Contextual Info: G E SOLI D S T A T E Gl ÌÈj| 3 ñ ? S Q ñ l □ D 1 B 3 C]4 T | 3875081 G E SOLID STATE 01E I3394 D . T - 3 7 -/7 CD4536B Types CMOS Programmable Timer High-Voltage Types 20-Volt Rating 0-BYPASS 6 Thé RCA-CD4536B is a programmable timer consisting o f 24 ripple-binary counter stages.

TSCC 1100

Abstract: SI03
Contextual Info: 5ôE D • b 7 2 4 2 4 D □ 0 1 3 4 7 b =12a « O K I J O K I O K I s e m i c o n d S E M I C O N D U C T O R GR OU P u c t o r - r ^ - ¿ 3 - 1 ? M S M 5 1 4 2 5 2 262,144-Word x 4-Bit MULTIPORT DYNAMIC RAM <Fast Page Mode» <Fast Page Mode> DESCRIPTION

Hl-384

Abstract: VA08 HI-311
Contextual Info: HARRIS SEillCOND SECTOR 10E D | 4302271 00134=11 S I H I-3 8 4 /8 8 3 30 HARRIS T-51-11 Dual DPST CMOS Analog Switch January 1 9 8 9 Features Description • This Circuit Is Processed In Accordance to M ll-S td - The HI-384/883 dual DPST switch is a m onolithic device

Contextual Info: /UHOU. i I/ o u / a u CY7C460 CY7C462 CY7C464 Revision: August 17,1994 F# CYPRESS Cascadable 8K x 9 FIFO Cascadable 16K x9F IF O Cascadable 32K x9F IF O Features Functional Description • 8K x 9 ,16K x 9 ,32K x 9 FIFO buffer memory • Asynchronous read/write

Contextual Info: ¿/iiuiu. luööutiy, rwufucuy io, Revision: August 18,1994 ^ CYPRESS CY27H010 128K X 8 High-Speed CMOS EPROM Features Functional Description • CMOS for optimum speed/power • Highspeed — tAA = 25 ns max. commercial — *a a = 35 ns max. (military)

Contextual Info: ADVANCE MT4LC4M16K2/F5 4 MEG X 16 DRAM |U|ICRON X 16 DRAM 3.3V, FAST PAGE MODE FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V power supply • Industry-standard xl6 pinout, timing, functions and packages • 13 row-addresses, 9 column-addresses (K2) or

Contextual Info: 19-0243; Rev I 9/94 JV W V X A JV K 3 .0 V /3 .3 V M icroprocessor Supervisory Circuits These devices are designed for use in systems powered by 3.0V or 3.3V supplies. See the selector guide in the back of this data sheet for similar devices designed for 5V systems. The suffixes denote different reset threshold

Contextual Info: M 24LC174 ic r o c h ip 16K 2.5V Cascadable CMOS Serial EEPROM with OTP Security Page PACKAGE TYPE FEATURES • Single supply with operation down to 2.5V • 16 Bytes OTP Secure Memory • Low power CMOS technology • 1 mA active current typical - 10 |iA standby current typical at 5.5V

h1381

Abstract: H-1381 HI1-381
Contextual Info: HARRIS SEfllCOND SECTOR IDE D I 4302271 0013400 I HI-361/Q83 ül HARRIS • • , T—51-11 f" Dual SPST CMOS Analog Switch January 19 89 Features Description • This Circuit Is Processed In Accordance to M ll-S td - The H I-381/883 dual SPST sw itch is a m o n o lith ic device

3041 v

Abstract: HT-304 DG304 equivalent
Contextual Info: HARRIS SEfllCOND SECTOR IDE D 1 43PE371 DD13-M3t fl | HI-304/883 2 HARRIS T-51-11 Dual SPST CMOS Analog Switch J a n u a ry 1 9 8 9 Features Description • This Circuit Is Processed In Accordance to M il-S td 8 8 3 and Is Fully Conform ant Under the Provisions of