D4001 Search Results

KDE1204PFS3-8

Abstract: 12FL
Contextual Info: SPECIFIC A TIO N FO R APPROVAL CUSTOMER DESCRIPTION DC BRUSHLESS FAN DIMENSIONS 40X40X10 mm MODEL KDE1204PFS3-8 APPROVED NO APPROVED BY AUTHORIZED M. 7.19 «/ DAWN. W M4 / 6 CHKD. r y) \ \ APPD." /' ^ 7 yf ^PEC.NO D400156 ISSUE DATE 07.06.1999 EDITION REVISE DATE

D43C8

Abstract: d42c2 ge 04001 SO-64 D40D2 D40D4 D40D5 D40D7 D40D8 D41D1
Contextual Info: SILICON POWER TRANSISTORS COMPLEMENTARY— 1 AMPERE NPN D4001 - PNP Pt Tc = 25°C Max. W Veto Min. (V) Ir Cont (A) "i IlFE hpE @ 2V, 100mA @ 2V, 1A Min. Max. Min. Comments Package Type Package Outline No. Specifi­ cation Sheet No. - 6.0 30 1.0 50 150 10

Contextual Info: ^ Tex a s In s t r u m e n t s C D4001B , CD4002B, C D 4025B Types D ata sheet acquired from H arris Sem iconductor S C H S015 CMOS NOR Gates Features: • Propagation delay time = 60 ns typ. at C(_ = 50 pF, V d d = 10 V a Buffered inputt and outputs > Standardized symmetrical output characteristics

12FL

Abstract: KDE0504PEB2-8
Contextual Info: r SPECIFICATION FOR APPROVAL CUSTOMER DESCRIPTION DC BRUSHLESS FAN DIMENSIONS 40X40X 6 mm MODEL KDE0504PEB2-8 APPROVED NO APPROVED BY AUTHORIZED DAWN 7130 CHKD. SPEC. NO. ISSUE DATE EDITION REVISE DATE E.SPEC D400140 07.30.1998 ED10008 SUNONWEALTH E LE C TR IC M ACHINE INDUSTRY CO., LTD.

Contextual Info: Common mode SU Coils – High Frequency Type SU 16VD Type [RoHS [RoHS Compliant] Compliant] Rated current A 3.0 3.0 3.0 4.0 4.0 Model SU16VD-30050 SU16VD-30040 SU16VD-30030 SU16VD-40020 SU16VD-40010 DC resistance (⏲/line) max. 0.08 0.07 0.07 0.05 0.04

cd 7377

Abstract: mit 5233 80C300 C0ST10 FZL 111 buss2
Contextual Info: Full Duplex 80C300 HURWOUC” Technology, Incorporated Full Duplex C M O S Ethernet 10/100 Mega Bit/Sec Data Link Controller Preliminary June 1995 Features • L o w P o w e r CMOS T e c h n o lo g y ■ 10/100 M B it E th e rn e t C o n tro lle r O p tim iz e d fo r

84C300A

Contextual Info: Full Duplex 84C 300A 4-Port Fast Ethernet Controller Technology Incorporated PRELIMINARY _April 19, 1996 Features • Low Power CMOS Technology ■ 4-Port Ethernet Controller Optimized for Note: Check for latest Data Sheet revision

SES N 2402

Abstract: st6116 IC 7400 data sheet 93C95 93C95A ATM25 TM25 108404
Contextual Info: 93C95 ATM 25.6 MB Transceiver and Data Recovery 1C Technology, Incorporated PRELIMINARY Features • Integrated ATM 25 PMD Sublayer ■ Single Chip Interface Between TC Transmission Convergence A nd Twisted Pair Wire ■ ■ ■ ■ ■ ■ On Chip Transmit Wave Shaping A nd Filters

sr flip flop

Abstract: ICAN-6166 CD4017 divide by 60 counter cd4017 application CD4017A RCA-CD4017A cd4017 applications johnson decade counter application of i CD4017 CD4017
Contextual Info: CD4017A Types CMOS Decade Counter/Divider Plus 10 Decoded Decimal Outputs The R CA-CD4017A consists o f a 5-stage Johnson decade counter and an o u tp u t de­ coder w hich converts the Johnson binary code to a decimal number. Inputs include a C LO CK, a RESET, and a CLO CK IN H IB IT

80C300

Abstract: 84C300A QQ84301
Contextual Info: Full Duplex 4-Port Fast Ethernet Controller T e ch n o lo g y Incorporated PRELIMINARY DATA SHEET A pril 9, 1997 Features • Low Pow er CMOS Technology ■ 4-Port Ethernet Controller O ptim ized for Note: Check for latest Data Sheet revision before starting an y designs.

Contextual Info: LSiirautH" 80220/80221 10OBASE- TX/1OBASE- T Ethernet Media Interface Adapter 98184 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Features • Single Chip 100B ase-T X /1 OBase-TPhysical Layer Note: C heck fo r latest Data Sheet revision

Contextual Info: 80C26 SEEQ CMOS Ethernet Interface Adapter in 28L Package T e c h n o lo g y , In c o rp o ra te d October 1994 PRELIMINARY SEEQ AutoDUPLEX Designation Sym bol indentifies product as AutoD UPLEX device • Provides Au to D U P L E X Detect Function for Full

Contextual Info: Part Number: Integra IB1012S20 TECHNOLOGIES, INC. Silicon Bipolar − Ultra-high fT L-Band Avionics Transistor Class C Operation − High Efficiency The high power pulsed avionics transistor part number IB1012S20 is designed for L-Band avionics systems operating at 1025 to 1150 MHz. While operating

cx3804

Abstract: pegatron pegatron A35 A35 pegatron diode c0510 pegatron a24 Cx3808 q8607 IT8752E tpc8118
Contextual Info: 5 4 3 M52V BLOCK DIAGRAM 2 1 Power CPU VCORE PENRYN DC&QC Page 80 System Page 3~5 D D Page 81 FSB 1066MHz 1.5VS & 1.05VS LCD Panel Page 82 Page 45 PCIE x16 MXM CRT DDR2 800MHz CANTIGA nVIDIA NB9x Page 46 DDR & VTT DDR2 So-DIMM Page 83 Page 7~9 Page 70 +2.5VS

TAIMAG HD 081 A

Abstract: ce-0702 TAIMAG HA 003 1C-8100 ALC660 CE-0703 0845a asus sw3205 R3627
Contextual Info: 5 4 3 2 1 G1S: MEROM/965-PM/ICH8-M/NB8P-GS BLOCK DIAGRAM CLOCK GEN CK505 ICS9LPR363CGLF-T D Merom CPU FAN + THERMAL SENSOR 478B uFCPGA VRAM CH.C GDDR3 *2 LVDS PAGE 45 PAGE 46 PAGE 50 FSB 800 MHz 136 FBGA PAGE 72 NVIDIA NB8P-GS CRT PAGE 3-6 VRAM CH.A GDDR3 *2

mcp67m

Abstract: MCP67MV MCP67D MCP67MV- A2 c5304 asus nvidia mcp67 MCP67 C9236 ricoh r5c833
Contextual Info: A B C D E A8N_A8Dc AMD/MCP67MV/MCP67D BLOCK DIAGRAM 1 BATTERY TYPE Sub block Diagram / BOM option 1 3S2P 64 POWER SEQENCE 2 . CPU CPU CAP 5 AMD Turion 64 F/G DDR2 533/667/800 SODIMM X2 3,4 LFB 2 LFB LFB HOST BUS DVI Dual CH. 47 CRT & TV CON 46 LFB VGA CON

C8816

Abstract: ricoh r5c833 C2335 IT8510 nvidia nb8 vga board l3404 asus CON61 R5600 D8103
Contextual Info: 5 4 3 2 1 AC_BAT_SYS 0925 +5VO 0925 + Q8200 R8209 4.7Ohm D + 1 D1_1 G1 8 2 D1_2 S1/D2_3 7 3 G2 S1/D2_2 6 4 S2 S1/D2_1 5 G D +1.05VO S Q8201 SI4800BDY @ JP8203 1 C8211 0.1UF/50V MLCC/+/-10% R8206 0Ohm C8213 4.7UF/6.3V MLCC/+/-10% 1 2 TPC28T T8209 TPC28T T8216

tps51620

Abstract: alc889 bq24721 tps51125 ITE8512E C5134 TI_BQ24721C_QFN_32P INVENTEC JMB385 fds8884
Contextual Info: www.kythuatvitinh.com KiliManjaro CS Build A02 2008.02.04 Digitally signed by dd DN: cn=dd, o=dd, ou=dd, email=dddd@yahoo. com, c=US Date: 2009.11.29 17:18:29 +07'00' EE DATE POWER DATE DRAWER DESIGN CHECK RESPONSIBLE DATE CHANGE NO. REV 3 SIZE = FILE NAME : XXXX-XXXXXX-XX

ASUS

Abstract: fingerprint rs 306 nvidia nb8 vga board AT24C02B Q2400a Q4500 TMs 1122 NL IT8510 it8511 C5500
Contextual Info: A B C D E A8E/A8S Merom/GM965/PM965 BLOCK DIAGRAM 1 BATTERY TYPE Sub block Diagram / BOM option 1 3S2P 64 CLOCK GEN ICS9LPR363AGLF-T 29 CPU MEROM LFB 2 DVI CH. LFB LFB CPU CAP POWER SEQENCE 2 5 LFB HOST BUS Dual 47 CRT & TV 46 CON . 3,4 VGA CON Nvidia NB8x series

c5129

Abstract: C5149 C5148 88E8001 CPUTEST29H D4203 D4004 u6202 R6130 R6503
Contextual Info: 5 4 3 2 A6M 1 REVISION: 2.0 128-BIT AMD S1g1 D Unbuffer DDR2 SO-DIMM Channel A/B x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 CRT C51MV C TV OUT X8 /X4 HyperTransport 200/400/800 MHz BGA 468 PCMCIA 33MHz

tps51125

Abstract: alc889 c2233 fds8884 bq24721 BQ24721C Inventec IT8512E tps51125 kbc AR8121
Contextual Info: TETON2 DDRIII-Pre MV BUILD 2008.06.18 EE DATE DATE POWER DRAWER DESIGN CHECK RESPONSIBLE DATE CHANGE NO. REV 3 SIZE = FILE NAME : XXXX-XXXXXX-XX XXXXXXXXXXXX P/N INVENTEC TITLE VER : TETON2 SIZE CODE A3 CS SHEET DOC. NUMBER REV 1310A22077-0-MTRA02 1 OF 53

TI_BQ24721C_QFN_32P

Abstract: tps51620 INVENTEC 4250T PCMB0603T PCI7412 BQ24721C bq24721 ddr3_sodimm0 ich9
Contextual Info: CARLISLE CS3 Bulid PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 PAGE PAGE TABLE OF CONTENTS SYSTEM BLOCK DIAGRAM POWER BLOCK DIAGRAM DC & BATTERY CHARGER SYSTEM POWER +V3A / +V5A SYSTEM POWER (+VGFX_CORE) CPU POWER (+VCC_CORE)

two4b

Abstract: EN 593 10 35L CAP count basie mdc 1200 Encoder/Decoder Seeq Technology LINK100 T40E 8025g 4B5B decoder
Contextual Info: 80220/80221 Technology Incorporated 100BASE-TX/1OBASE-T Ethernet Media Interface Adapter DATA SHEET Features • Single Chip 100B ase-TX /10B ase-TP hysical Layer Solution ■ ■ ■ ■ ■ ■ ■ D ual Speed -1 0 0 /1 0 Mbps H alf A n d Full Duplex M il Interface To Ethernet Controller

D4001A

Contextual Info: CD4022A Types VD0 CMOS Divide-By-8 Counter/Divider With 8 Decoded Outputs The R C A^C D 4022A types consist o f a 4stage divide-by-8 Johnson counter, associ­ ate decode o u tp u t gating and a C ARR YO U T BIT. The counter is cleared to its zero c o u n t by a high RESET signal. The counter