D305 Search Results

D3055

Abstract: D3055L
Contextual Info: S DU/D3055L2 S amHop Microelectronics C orp. May,2004 ver1.1 N-C hannel E nhancement Mode Field E ffect Trans is tor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) Max R ugged and reliable.

Contextual Info: S T U/D3055L S amHop Microelectronics C orp. Arp,20 2005 ver1.2 N-C hannel Logic Level E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON ( mW) S uper high dense cell design for low R DS (ON ). Max R ugged and reliable.

Contextual Info: S DU/D3055L2 S amHop Microelectronics C orp. May,2004 ver1.1 N-C hannel E nhancement Mode Field E ffect Trans is tor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) Max R ugged and reliable.

D3055L

Abstract: D3055
Contextual Info: S T U/D3055L S amHop Microelectronics C orp. Nov,01 2006 ver1.3 N-C hannel Logic Level E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID S uper high dense cell design for low R DS ON . R DS (ON) ( m Ω ) Max R ugged and reliable.

D3055

Contextual Info: S DU/D3055L2 S amHop Microelectronics C orp. Augus t , 2002 N-C hannel E nhancement Mode Field E ffect Trans is tor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) TYP R ugged and reliable. 34 @ V G S = 4.5V

DP8480

Abstract: D3058
Contextual Info: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, N OVEMBER 1987 - REVISED FEBRUARY 1993 ECL Control Inputs 3-State Outputs 10K ECL Input Compatible N PACKAGE fTOP VIEW Ve e [ 1 DO [ 2 Direct Replacement for National Semiconductor DP8480

Contextual Info: SN54BCT2241, SN74BCT2241 OCTAL BUFFERS AND LINE DRIVERS/MOS DRIVERS WITH 3 STATE OUTPUTS D3057, SEPTEM BER 1988 BiCMOS Design Substantially Reduces Standby Current SN 54BCT2241 . J P A C KA G E S N 74 B C T 2 2 4 1 DW OR N P A C KA G E 1G 1A l 2Y4 1A 2 • ESD Protection Exceeds 2000 V Per

D3059

Abstract: DP8481
Contextual Info: DP8481 10K TTL-TO-ECL LEVEL TRANSLATOR WITH LATCH SLLS036B - D3059, N O V E M B E R 1987 - REVISED FE B R U A R Y 1993 * E C L Control Inputs N PACKAGE * 10K E C L Compatible frOP VIEW * Propagation D elay. . . 4 ns Typ VE E [ * Direct Replacement for National

D3055

Abstract: 1S10M
Contextual Info: S T U/D3055NL S amHop Microelectronics C orp. P reliminary May.28,2004 N-C hannel E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) Max R ugged and reliable.

D3055L

Abstract: D3055
Contextual Info: S T U/D3055L Green Product S amHop Microelectronics C orp. Nov,01 2006 ver1.3 N-C hannel Logic Level E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON ( mΩ) S uper high dense cell design for low R DS (ON ).

Contextual Info: STU/D3055L2 SamHop Microelectronics Corp. Jul.16 2004 ver1.1 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY VDSS ID RDS ON (mW) Super high dense cell design for low RDS(ON). Max Rugged and reliable. 40 @ VGS = 4.5V

Contextual Info: S T U/D3055L2 S amHop Microelectronics C orp. Nov,26 2004 ver1.2 N-C hannel Logic Level E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON ( mW) S uper high dense cell design for low R DS (ON ). Max R ugged and reliable.

Contextual Info: STU/D3055L2-60 SamHop Microelectronics Corp. July 23, 2004 v1.1 N-Channel Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY VDSS ID RDS ON Super high dense cell design for low RDS(ON). ( m Ω) Max Rugged and reliable. 65 @ VGS = 4.5V 20V TO-252 and TO-251 Package.

Contextual Info: S T U/D3055L Green Product S amHop Microelectronics C orp. Nov,01 2006 ver1.3 N-C hannel Logic Level E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON ( mΩ) S uper high dense cell design for low R DS (ON ).

DP8480D

Contextual Info: TEXAS INSTR -CLOGIO ObE D | D D 7 C]174 T | DP8480 10K ECL TO T T L LE V EL T R A N S LA T O R WITH LATCH T S Z - l D3058, NOVEMBER 1987-REVISED DECEMBER 1988 D OR N PACKAGE ECL Control Inputs TOP VIEW 3-State Outputs V e e C 1 U l 6 1 v Cc 15 D QO DOC 2

d3055

Contextual Info: STU/D3055L2-60 SamHop Microelectronics Corp. Nov 26 , 2004 Ver1.2 N-Channel Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY VDSS ID RDS ON Super high dense cell design for low RDS(ON). ( m Ω) Max Rugged and reliable. 65 @ VGS = 4.5V 20V

D3055

Abstract: CJD3055 cev code CJD2955
Contextual Info: Central CJD2955 PNP D3055 NPN Sem iconductor Corp. COMPLEMENTARY SILICON POWER TRANSISTOR DESCRIPTION: The CENTRAL SE M IC O N D U C T O R CJD2955, CJ D3055types are Complementary Silicon Power Transistors manufactured by the epitaxial base process, mounted in a

SN54BCT2244

Abstract: SN74BCT2244 D3057
Contextual Info: SN54B CT2244, SN74B CT2244 OCTAL BUFFERS AND LINE DRiVERS/MOS DRIVERS W ITH 3-STATE OUTPUTS D3057, SEPTEMBER 1 9 8 8 - REVISED OCTOBER 1990 S N 5 4 B C T 2 2 4 4 . - J P AC KA G E S N 7 4 B C T 2 2 4 4 . . . D W O R M P AC KAG E BiCMOS Design Substantially Reduces

Contextual Info: STU/D3055L2 SamHop Microelectronics Corp. Feb.01 2005 ver1.3 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY VDSS ID RDS ON (mW) Super high dense cell design for low RDS(ON). Max Rugged and reliable. 40 @ VGS = 10V

Contextual Info: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, NOVEMBER 1987 - REVISED FEBRUARY 1993 * ECL Control Inputs * 3-State Outputs N PACKAGE TOP VIEW * 10K ECL Input Compatible v Ee * Direct Replacement for National Semiconductor DP8480 [ 1

D325R

Abstract: D302RP D312 D301RP D303RP D304RP D305RP D311RP D312RP D313RP
Contextual Info: Model Selection Guide Model Number D301RP D302RP D303RP D304RP D305RP D311RP D312RP D313RP D314RP D315RP D321RP D322RP D323RP D324RP D325RP Notes: Input Voltage VDC Current (mA) Nominal Range Full-Load No-Load 5 4.5 - 5.5 895 90 5 4.5 - 5.5 895 90 5 4.5 - 5.5

50 hz Oscillator inverter dc ac

Abstract: capacitor 22 nF 200V d305a transistor marking A02 1DDD305AA circuit diagram of 525 VA power inverter 305A MARKING low voltage clf circuit Sumida LCD Inverter CLS62
Contextual Info: Data Sheet D305A Electroluminescent Lamp Driver IC General Description Features • • • • • D3 05 A The Durel D305A is a high-power IC inverter intended for driving EL lamps as large as 100 cm2. The D305A IC is equipped with many control functions, including: waveshapingTM programmability for minimizing audible noise, and

Liquid Level

Abstract: D2050
Contextual Info: Optical Liquid Level Sensors D205 & D305 Series * 1/2” BSPT Screw-in Body * Low cost * Compact size * Wide range of commercial and industrial applications. Features: Standard Temperature High Temperature 1/2” BSPT Metal Body Housing Digital - High in Air

Contextual Info: S T U/D3055NL S amHop Microelectronics C orp. P reliminary May.28,2004 N-C hannel E nhancement Mode Field E ffect Transistor F E AT UR E S P R ODUC T S UMMAR Y V DS S ID R DS ON S uper high dense cell design for low R DS (ON ). ( m W ) Max R ugged and reliable.