D3 1300 02 Search Results

LCD 1601 display

Abstract: LCD 16 X 2 yd 1040 14 pin DOT MATRIX 16 x 2 lcd panel 26 pin DOT MATRIX 8 x 8 DOT MATRIX DISPLAY LCD 4 X 20 16 x 2 LCD display lcd display data sheet 5 x 7 DOT MATRIX DIAGRAM
Contextual Info: PF783-02 SED1570D0A SED1570D 0A Dot Matrix High Duty LCD Driver SSC5000Series ● 80 Output Segment Driver ● Built-in Display RAM 80x200 bits ● Self-refresh Function • DESCRIPTION The SED1570 is an 80 output segment column driver with an internal display RAM. This drive is suitable for

STGL 12

Abstract: ha 1452 1SS g STGL 52
Contextual Info: PF783-02 EPSON SEDI 570Doa Dot Matrix High Duty LCD Driver • 80 Output Segment Driver • Built-in Display RAM 80x200 bits • Self-refresh Function • DESCRIPTION T h e S E D 1 5 7 0 is an 80 output segm ent column driver with an internal display R AM . This drive is suitable for

ha 1452

Contextual Info: P F783-02 EPSON SEDI 570Doa Dot Matrix High Duty LCD Driver • 80 Output Segment Driver • Built-in Display RAM 80x200 bits • Self-refresh Function • DESCRIPTION The SED 1570 is an 80 output segment column driver with an internal display RAM. This drive is suitable for

Contextual Info: * 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 1lOOps ■ lEEmln. of -170mA ■ ESD protection of 2000V ■ Internal 75KO input pull-down resistors ■ Industry standard 100K ECL levels

Q002

Abstract: F100K SY100S336
Contextual Info: * 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY SY100S336 S E M IC O N D U C T O R DESCRIPTION FEATURES • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 1100ps ■ I ee min. o f-1 7 0 m A ■ ESD protection of 2000V ■ Internal 75K Q input pull-down resistors

F100K

Abstract: SY100S336
Contextual Info: * 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY S EM IC O N D U C TO R FEATURES D E S C R IP T IO N I l I I I I I Max. shift frequency of 700MHz Clock to Q delay max. of 1lOOps lE E m ln . of -170mA ESD protection of 2000V Internal 75KÎ2 input pull-down resistors

Contextual Info: O • ira ENHANCED 4-STAGE COUNTER/SHIFT REGISTER ^ SYNERGY cvm n^A oYi 00S336A SEMICONDUCTOR FEATURES DESCRIPTION ■ Max. shift frequency of 700MHz ■ Clock to Q delay max. of 110Ops ■ Sn to TC speed improved by 50% ■ Sn set-up and hold tim e reduced by more than 50%

F100K

Abstract: SY100S336 SY100S336A SY100S336ADC
Contextual Info: ENHANCED 4-STAGE COUNTER/SHIFT REGISTER m v SYNERGY . Vim <N «4 S i i 00S336A S E M IC O N D U C T O R DESCRIPTION FEATURES • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 110Ops ■ Sn to TC speed improved by 50% ■ Sn set-up and hold time reduced by more than 50%

F100K

Abstract: SY100S336 SY100S336A SY100S336ADC PN800
Contextual Info: 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY S EM IC O N D U C TO R FEATURES I l I l l I SY100S336A D E S C R IP T IO N Max. shift frequency of 700MHz Clock to Q delay max. of HOOps Sn to TC speed Improved by 50% Sn set-up and hold time reduced by more than 50%

Contextual Info: * 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY SY100S336A SEMICONDUCTOR FEATU R ES DESCRIPTION • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 1lOOps ■ Sn to TC speed improved by 50% ■ Sn set-up and hold time reduced by more than 50% ■ I e e min. of -170mA

OR73

Abstract: 73k312l 73K222
Contextual Info: 0253^5 ÜDDTflTG MOb « S I L SSI 73K312L Bell 202,103 and CCITT V.23, V.21 Single-Chip Modem A TDK Group/Company Preliminary Data SILI CO N SYSTEMS INC DESCRIPTION L IE D December 1992 ~ 7S -3 Z -Ú > 5 FEATURES Bell 202, 103 and CCITT V.23, V.21 slngle-chlp

V23826-K15-C

Abstract: V23826-K15-C13 V23826-K15-C313 V23826-K15-C353 V23826-K15-C363 V23826-K15-C373 V23826-K15-C53 V23826-K15-C63 V23826-K15-C73
Contextual Info: V23826-K15-C * (5V/3.3V) Single Mode 1300 nm 1.0625 GBd Fibre Channel 1.3 Gigabit Ethernet 1x9 Transceiver Dimensions in (mm) inches (9.79 max) .385 max Optical Centerline View Z (2) .080 (Lead cross section and standoff size) (0.63 ±0.2) .025 ±.008 (3.3 ±0.2)

Contextual Info: ^ 4-STAGE COUNTER/ SHIFTREGISTER SYNERGY SY100S336 SEMICONDUCTOR FEATURES DESCRIPTION • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 110Ops ■ Iee min. o f-1 7 0 m A ■ ESD protection of 2000V ■ Internal 75K Q input pull-down resistors

Contextual Info: OKI Semiconductor MSM7564-01 FEDL7564-01-02 Issue Date: Jul. 12, 2002 Preliminary A Single Chip 14.4 kbps Data & Fax Modem GENERAL DESCRIPTION The MSM 7564-01 is a highly integrated single-chip modem IC which provides the functions needed to construct 14.4 kbps full-duplex and half-duplex modems. This device is compliant with the

Contextual Info: * Î S TAG E C O U N T E R SY N E R G Y S H IF T R E G IS T E R 3* 1003336 S E M IC O N D U C T O R FEATURES DESCRIPTION • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 1100ps ■ Iee min. o f-170m A ■ Internal 75KQ input pull-down resistors

Contextual Info: Option 01, Option 02 Tape and Reel Options for T-1¾ 5 mm , T-1 (3 mm), LED Lamps Data Sheet Description Features T-1 and T-1¾ LED lamps are available on tape and reel as specified by the IEC Publication 286 and ANSI/EIA Standard RS-468. The Option 01 lamp devices have formed leads

HLMP-3300

Abstract: catalogue automatic lamp RS-468
Contextual Info: Tape and Reel Options for T-13/4 5 mm , T-1 (3 mm), LED Lamps Technical Data Option 01 Option 02 Features Ordering Information • Compatible with Radial Lead Automatic Insertion Equipment • Meets Dimensional Specifications of IEC Publication 286 and ANSI/EIA Standard

1700 KP

Abstract: 2 channel tone receiver circuit 1700KP 78A207 78A207-CP N180
Contextual Info: 78A207 MFR1 Receiver April 2000 DESCRIPTION FEATURES The 78A207 is a single-chip, Multi-Frequency MF receiver that can detect all 15 tone-pairs, including ST and KP framing tones. This receiver is intended for use in equal access applications and thus meets

si 5338

Contextual Info: * E N H A N C E D 4- STAGE COUNTER/SHIFT REGISTER SYN ER G Y ' l0t fc,3oA S E M IC O N D U C T O R FEATURES DESCRIPTION • Max. shift frequency of 700MHz T he S Y 1 00 S 3 36 A is fu n c tio n a lly th e sam e as the SY 100S 336, but has Sn to T C speed and Sn set-up and

Contextual Info: * 4-STAGE CO U N TER / SHIFT REGISTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION The SY100S336 functions either as a m odulo-16 up/ down counter or as a 4-bit bidirectional shift register and is designed for use in high-perform ance ECL system s. Three Select inputs Sn are provided fo r determ ining the mode of

1700 KP

Abstract: 78A207 78A207-CP N180 dv 700 inverter
Contextual Info: 78A207 MFR1 Receiver April 2000 DESCRIPTION FEATURES The 78A207 is a single-chip, Multi-Frequency MF receiver that can detect all 15 tone-pairs, including ST and KP framing tones. This receiver is intended for use in equal access applications and thus meets

5968-4164E

Abstract: led lead frame IEC-Publication-286
Contextual Info: Tape and Reel Options for T-13/4 5 mm , T-1 (3 mm), LED Lamps Technical Data Option 01 Option 02 Features Ordering Information • Compatible with Radial Lead Automatic Insertion Equipment • Meets Dimensional Specifications of IEC Publication 286 and ANSI/EIA Standard

Contextual Info: V ENH A N C ED 4-STAGE SYNERGY eu, nnMOCA SY100S336A C O U N TE R /S H IF T REGISTER SEMICONDUCTOR FEATURES DESCRIPTION Max. shift frequency of 700MHz Clock to Q delay max. of 1100ps Sn to TC speed improved by 50% Sn set-up and hold time reduced by more than 50%

Contextual Info: ENHANCED 4-STAGE COUNTER/SHIFT REGISTER SYNERG Y SY100S336A SEMICONDUCTOR FEATURES DESCRIPTION Max. shift frequency of 700MHz Clock to Q delay max. of 1100ps Sn to TC speed improved by 50% Sn set-up and hold time reduced by more than 50% Iee min. of -170m A