CYPRESS FLASH 370 CPLD Search Results

Contextual Info: * CYPRESS ADVANCED INFORMATION CY7C375Ì UltraLogic 128-Macrocell Flash CPLD Features speed CPLDs. Like all members of the F lash 370 i family, the CY7C375i is de­ • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock

Contextual Info: Revision: June 24, 1996 rw CYPRESS CY7C374 - UltraLogic 128-Macrocell Flash CPLC T h e logic blocks in the F l a s h 370 arch itecture are con ne cte d w ith an e xtrem e ly fast and pre dicta ble routing resource— the P rog ram m a ble Interconnect M atrix PIM . T h e PIM brings fle x ­

Contextual Info: O T / OC5 /0 5 :» /» ^ R e v is io n : J u n e 24, 1996 CY7C373 rw CYPRESS UltraLogic 64-M acrocell Flash CPLC F la s h 370 fam ily, the C Y 7 C 3 73 is designed to bring the ease of use and high p e rfo rm an ce of th e 2 2 V 10 to h ig h -d e n s ity

cypress flash 370 device

Abstract: cypress flash 370 CPLD features cypress flash 370 cypress flash 370 logic block diagram of cypress flash 370 device cypress flash 370 technology cypress flash 370 device technology
Contextual Info: fax id: 6126 For new designs, see CY7C371L CY7C371 UltraLogic 32-Macrocell Flash CPLD of use and high performance of the 22V10 to high-density CPLDs. Featu res • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins

architecture of cypress FLASH370 cpld

Abstract: cypress flash 370 cypress flash 370 device logic block diagram of cypress flash 370 device features cypress flash 370 architecture of cypress FLASH370 device cypress flash 370 CPLD cypress flash 370 device technology cypress FLASH370 logic
Contextual Info: fax id: 6130 1CY 7C37 5 For new designs see CY7C375i. CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 28 macrocells in eight logic blocks The CY7C375 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370™ family of

319S2

Abstract: 7C375-83 CY7C375 FLASH370 25ab
Contextual Info: CY7C375 PRELIMINARY y CYPRESS 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed — fMAX = 100 MHz — tpD — 12 ns

cypress flash 370 CPLD

Abstract: features cypress flash 370 logic block diagram of cypress flash 370 device cypress flash 370 0117C
Contextual Info: 400-943-Z843-> 07/31/95 B9'i B7'ì Z7 16838B01932 Cypress Seniconducto Page B2B 7C37S: W ednesday September 23,1092 Revtalon: Thurvdty, June 1 8 ,1 M 4 CYPRESS 64-Macrocell Flash CPLD den q»ed delays such as fanout effects, in­ terconnect delays, or expander delays. Re­

cypress flash 370

Abstract: architecture of cypress FLASH370 device cypress flash 370 device architecture of cypress FLASH370 cpld CLCC 84 features cypress flash 370 CY7C373 CY7C374 FLASH370 CLCC 100
Contextual Info: fax id: 6129 1CY 7C37 4 For new designs see CY7C374i. CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins No hidden delays

Contextual Info: CY7C375 CYPRESS UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 m acrocells in eight logic blocks • 128 I/O pin s T h e CY7C375 is a Flash erasable Com plex Program m able Logic D evice C PL D and is p a rt o f th e F lash 3 7 0 “ family o f highdensity, high-speed C PLD s. Like all m em ­

Contextual Info: F lash 3 7 0 Wf • Flash erasable CMOS CPLDs • High density — 3 2 —256 macrocells — 3 2 -1 9 2 I/O pins — M ultiple clock pins • Warp2 — Low-cost, text-based design tool. PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms

Contextual Info: '= CYPRESS CY7C372 UltraLogic 64-Macrocell Flash CPLD Features Functional Description • 64 macrocells in four logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • No hidden delays • High speed - f M A X = 125 MHz The CY7C372 is a Flash erasable Complex

l041b

Abstract: I036
Contextual Info: CYPRESS CY7C375 PRELIMINARY 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed - f M A X = 100MHz — tpD = 12 DS

Contextual Info: CY7C374 PRELIMINARY y CYPRESS 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed — f M AX = 100 MHz — tpo = 12 ns — ts = 7 ns — t c o = 7 ns

features cypress flash 370

Abstract: logic block diagram of cypress flash 370 device cypress flash 370 device cypress flash 370 cypress flash 370 technology cypress FLASH370 device cypress quickpro II cypress flash 370 device technology
Contextual Info: F la s h 3 7 0 T0 CYPRESS — Low-cost, text-based design tool, PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms • Warp3m CAE development system — VHDL input — ViewLogic graphical user interface — Schematic capture ViewDraw

Contextual Info: UltraLogic 128-Macrocell Flash CPLD is designed to bring th e ease o f use and high perform ance o f th e 22V10 to highdensity CPLDs. Features • 128 macrocells in eight logic blocks • 64 I/O pins T he 128 m acrocells in th e CY7C374 are di­ vided betw een eight logic blocks. Each

Contextual Info: UltraLogic 64-Macrocell Flash CPLD Features Functional Description • 64 m acrocells in four logic blocks T h e CY7C373 is a Flash erasable Com plex Program m able Logic Device C PL D and is p a rt o f th e F lash 370 ” family o f highdensity, high-speed C PLD s. Like all m em ­

cypress flash 370

Abstract: 7C372 1603BB01932
Contextual Info: 40B-943-ZB43-> 07/31/95 09:03:11 1603BB0193Z Cypress Seniconducto Page B ll 7C372: Wednesday, September 23,1B62 Revision: Thursday, June 18,1B94 CYPRESS 64-Macrocell Flash CPLD Features FunctloDal Description e 64 macroceOs in four logic blocks The CY7C372li a F lu b erasable Complex

cypress flash 370

Abstract: architecture of cypress FLASH370 cpld cypress FLASH370 CY7C375 FLASH370 cypress flash 370 device CERAMIC QUAD FLATPACK CQFP 96 cypress flash 370 CPLD cypress FLASH370 programming 3803024
Contextual Info: 75 CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins • Bus Hold capabilities on all I/Os and dedicated inputs • No hidden delays

Contextual Info: CY7C374 W f CYPRESS UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed f M A X = 100 MHz — tpi = 12 ns — ts = 7 ns

CY7C375

Abstract: FLASH370 cypress flash 370 device
Contextual Info: For new designs, please see CY7C375i. CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins • Bus Hold capabilities on all I/Os and dedicated inputs

cypress flash 370

Abstract: logic block diagram of cypress flash 370 device 22v10 CY7C375 FLASH370 o112i cypress flash 370 CPLD cypress flash 370 device technology
Contextual Info: fax id: 6130 For new designs see CY7C375i CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 28 macrocells in eight logic blocks • 28 I/O pins • 6 dedicated inputs including 4 clock pins • Bus Hold capabilities on all I/Os and dedicated inputs

CY7C375

Abstract: FLASH370
Contextual Info: 7C375: Thursday, September 24, 1992 Revision: October 14, 1995 CY7C375 UltraLogict 128ĆMacrocell Flash CPLD Features Functional Description D D D The CY7C375 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370t family of highĆ

CY7C374-66AI

Abstract: cypress flash 370 CY7C373 CY7C374 FLASH370
Contextual Info: For new designs see CY7C374i CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs

cypress flash 370 device

Abstract: CY7C373 CY7C374 FLASH370 logic block diagram of cypress flash 370 device
Contextual Info: For new designs see CY7C374i CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs