319S2 Search Results

Contextual Info: UltraLogic 128-Macrocell Flash CPLD is designed to bring th e ease o f use and high perform ance o f th e 22V10 to highdensity CPLDs. Features • 128 macrocells in eight logic blocks • 64 I/O pins T he 128 m acrocells in th e CY7C374 are di­ vided betw een eight logic blocks. Each

319S2

Contextual Info: WFw CYPRESS CY7C374Ì ADVANCED INFORMATION UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology — JTAG interface

319S2

Abstract: 372i
Contextual Info: CY7C372Ì AD VAN C ED IN FO RM ATIO N Jf CYPRESS UltraLogic 64-Macrocell Flash CPLD F l a s h 3 7 0 i ™ fam ily o f h ig h -d e n sity , h ig h ­ F ea tu res • 64 m acrocells in fou r logic blocks • 32 I/O pins • 6 d ed icated in p u ts in clu d in g 2 clock

Contextual Info: CYPRESS AD VAN CED INFORMATION CY7C375Ì UltraLogic 128-Macrocell Flash CPLD Features • 128 m acrocells in eigh t logic b lock s • 128 I/O pins • 6 d ed icated in p u ts in clu d in g 4 clock p in s • In-S ystem R ep rogram m ab le IS R '“

319S2

Contextual Info: Reprogrammable Asynchronous CMOS Logic D evice Features • Advanced-user programmable macro­ cell • CMOS EPROM technology for repro­ grammability • Up to 20 input terms — Military/Industrial tpD s 20 ns tc o - 20 ns tsu = 10 ns • Low power — I c c niax — 80 mA Commercial

Contextual Info: CY7C374 W f CYPRESS UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed f M A X = 100 MHz — tpi = 12 ns — ts = 7 ns

319S2

Abstract: 7C371-83 CY7C371 CY7C372 FLASH370
Contextual Info: CY7C371 !f CYPRESS UltraLogic 32-Macrocell Flash CPLD Features Functional Description • 32 macrocells in two logic blocks T he CY7C371 is a Flash erasable Com plex Program m able Logic D evice C PL D and is p a rt o f th e F l a s h 3 7 0 family o f high-density, high-speed CPLD s. Like all m em bers

319S2

Abstract: 7C375-83 CY7C375 FLASH370 25ab
Contextual Info: CY7C375 PRELIMINARY y CYPRESS 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed — fMAX = 100 MHz — tpD — 12 ns

319s2

Contextual Info: ¿? CYPRESS CY7C373 UltraLogic 64-Macrocell Flash CPLD Features Functional D escription • 6 4 m acrocells in fou r logic blocks • 6 4 I/O pins • 6 d ed icated in p u ts in clu d in g 4 clock p in s • N o h id d en delays T h e C Y 7 C 3 7 3 is a F lash e ra s a b le C o m p lex

Contextual Info: CY7C374Ì AD VAN CED INFORMATION 'WCYPRESSUltraLogic Features • 128 m acrocells in eigh t logic b lock s • 6 4 I/O pins • 6 d ed icated in p u ts in clu d in g 4 clock p in s • In -S ystem R ep rogram m ab le 1SR *“ F lash tech n ology — JTAG in terface