10Gb Ethernet XGXS Core
Abstract: XGXS 8b/10b encoder MDIO MDC MDIO clause 45 ORT42G5 ORT82G5 ba rx
Contextual Info: 10Gb Ethernet XGXS Core July 2003 IP Data Sheet Features • 64-bit data/8-bit control packet generator/checker on the XGMII side that supports standard compliant CRPAT and CJPAT generation and checking for XAUI interoperability testing. • Standard compliant MDIO/MDC interface.
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ep4cgx30f484
Abstract: EP4CE115 CYIV-5V1-1 EP4CGX EP4CE55 EP4CE15 sigma delta lcd screen lvds 40 pin diagram ep4ce22 ep4ce40
Contextual Info: Cyclone IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CYIV-5V1-1.5 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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8B10B
Abstract: C035 CL45 P802 TLK3138
Contextual Info: TLK3138 www.ti.com SLLS762C – FEBRUARY 2007 – REVISED DECEMBER 2009 Dual XAUI Transceiver Check for Samples: TLK3138 • • • • • • • • 1 XGMII Extender Sublayer APPLICATIONS • 10 Gigabit Ethernet Servers and Routers TLK3138 TCLK(0) TD(31.0)
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Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com • • • • • • • • • • • Fabricated in Advanced 130-nm CMOS Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0) RCLK RD(31.0)
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OC48
Abstract: SSTL-15 SSTL-18
Contextual Info: Arria II Device Handbook Volume 3: Device Datasheet and Addendum Arria II Device Handbook Volume 3: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V3-4.0 Document last updated for Altera Complete Design Suite version:
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r727
Contextual Info: User's Guide SLLU180 – June 2013 TLK10232 Dual-Channel XAUI/10GBASE-KR Transceiver with Crosspoint Evaluation Module EVM Graphical Users Interface User’s Guide This user’s guide describes the usage and construction of the TLK10232 evaluation module (EVM). This
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HDMP-2634
Abstract: 70841A C0603X7R160-104KNE CB10 E1 to fiber optic converter circuit
Contextual Info: Agilent HDMP-2634 2.5/1.25 GBd Serdes Circuit Data Sheet Description This data sheet describes the HDMP-2634 Serdes device for 2.5 GBd serial data rates. The HDMP-2634 Serdes is a silicon bipolar integrated circuit in a metallized QFP package. It provides a
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SMD codes
Abstract: 063310
Contextual Info: QuadPHY 10GX ASSP Telecom Standard Product Data Sheet Released PM8358 QuadPHY® 10GX 4 X 1.2 to 3.2 Gbit/s Quad, Fully Redundant, XAUI to XGMII, 10 Gigabit Ethernet / Fibre Channel Physical Layer Device Data Sheet Released Issue No. 5: April 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
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DSA-X91604A
Abstract: 80804A N5400A DSAX92004A DSAX91604A 5989-1527EN N5392A E2688A n5381 DSA-X92504A
Contextual Info: Agilent Technologies N5410A Fibre Channel Compliance Application for Infiniium Series Oscilloscopes Data Sheet The Agilent Technologies N5410A Fibre Channel Compliance application for Infiniium Series Oscilloscopes provides you with a fast and easy way to characterize
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infiniband PHY
Abstract: M27205 10GEA
Contextual Info: A CONEXANT BUSINESS 1-3.4 Gbps SerDes Transceiver with Amplif-Eye2™ M 2 7 2 0 5 Quad SkyRail™ Low power 1-3.4 Gbps CMOS SerDes transceiver for high reliability 10 Gigabit Ethernet, 10 Gigabit Fiber Channel, Infiniband, backplane and optical module applications
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EP4CE15
Abstract: F169 Texas Instruments Cyclone IV EP4C Series Power Reference Designs ep4ce40 CYIV-5V1-1 4CGX75 V-by-One n148 TYPE SKP 38 CL 9001 ep4cgx30f484
Contextual Info: Cyclone IV Device Handbook, Volume 1 Cyclone IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CYIV-5V1-1.6 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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Broken Conductor Detection for Overhead Line Distribution System
Abstract: verilog code for CORDIC to generate sine wave verilog code for cordic algorithm for wireless la TXC 13.56 sma diode h5c intel 945 motherboard schematic diagram 2005Z fet k241 EARTH LEAKAGE RELAY diagram schematic diagram for panasonic inverter air cond
Contextual Info: Stratix GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SGX5V1-1.2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
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broken conductor detection for overhead line distribution systemverilog code for cordic to generate sine waveverilog code for cordic algorithm for wireless latxc 13.56+6sma diode h5cintel 945 motherboard schematic diagram2005zfet k241earth leakage relay diagramschematic diagram for panasonic inverter air cond
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cd 1619 CP
Abstract: RX SOP 1738 bc 494 b f.m transmitter Schematics AL 1450 DV hp 2212 sdc 2025 AL 2450 dv circuit diagram toggle switches 2041 BY TRANSISTOR BC 187 vhdl code for 16 prbs generator
Contextual Info: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
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cd 1619 cprx sop 1738bc 494 b f.m transmitterschematics al 1450 dv+6hp 2212sdc 2025al 2450 dv circuit diagramtoggle switches 2041 bytransistor bc 187vhdl code for 16 prbs generator
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crpa
Abstract: HD-SDI over sdh SSTL-15 HIV54001-1 SSTL-18 HC4GX35FF1517N M144K
Contextual Info: HardCopy IV Device Handbook, Volume 4 101 Innovation Drive San Jose, CA 95134 www.altera.com HC4_H5V4-1.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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Contextual Info: 19-2630; Rev 4; 10/08 6.25Gbps, 1.8V PC Board Equalizer The MAX3785 6.25Gbps equalizer operates from a single 1.8V supply and compensates for transmissionmedium losses encountered with FR-4 transmission lines. Optimized for low-voltage, high-density, DC-coupled interconnections between the line card and switch
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Contextual Info: TLK3134 4-Channel Multi-Rate Transceiver Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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Contextual Info: TLK3131 Single Channel Multi-Rate Transceiver Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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513 b14
Contextual Info: TLK2226 www.ti.com SLLS689C – JANUARY 2006 – REVISED MAY 2006 6 PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • • • Six 1.25 Gigabits Per Second Gbps Synchronizable Transceivers (Support for 100 Mbps 100Base-FX Mode)
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X557-AT2
Abstract: lp 8029 l4
Contextual Info: Intel X557-AT/AT2/AT4 10 GbE PHY Datasheet Networking Division ND Features: 10GBASE-T Performance — Ability to support worst case channels while reducing power and latency when channel characteristics permit: Built-in thermal management capabilities — Enables deployment in thermally constrained
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AIIGX53001-3
Abstract: half bridge converter 2kw higig pause frame EP2AGX65 EP2AGX65DF29 HDTV transmitter receivers block diagram 32-Bit Parallel-IN Serial-OUT Shift Register prbs parity checker and generator SILICON General 741 PMD Motion
Contextual Info: Arria II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-3.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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prbs parity checker and generator
Abstract: AGX51001-2 0278 xf Verilog DDR memory model
Contextual Info: Section I. Arria GX Device Data Sheet This section provides designers with the data sheet specifications for Arria GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating
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EP4CGX150 speed MHz
Abstract: EP4CE115 EP4CE15 EP4CE10 EP4CE22 F324 SSTL-18 Cyclone Device EP4CGX150 U 2554 b
Contextual Info: 1. Cyclone IV Device Datasheet CYIV-53001-1.3 This chapter describes the electrical and switching characteristics for Cyclone IV devices. Electrical characteristics include operating conditions and power consumption. Switching characteristics include transceiver specifications, core, and
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HD-SDI over sdh
Abstract: GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18
Contextual Info: 1. Arria II GX Device Datasheet AIIGX53001-3.0 This chapter describes the electrical and switching characteristics of the Arria II GX device family. This chapter contains the following sections: • “Electrical Characteristics” on page 1–1 ■ “Switching Characteristics” on page 1–12
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hd-SDI driver
Abstract: HD-SDI over sdh PCI 1350 HIV54001-1 SSTL-15 SSTL-18 PRBS24
Contextual Info: Section I. HardCopy IV Device Datasheet This section provides the datasheet for the HardCopy IV device family. This section includes the following chapter: • Chapter 1, DC and Switching Characteristics of HardCopy IV Devices Revision History Refer to each chapter for its own specific revision history. For information on when
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