CODER Search Results

TC4532BP

Abstract: TC4532B bflal
Contextual Info: TC4532BP C 2M OS D IG ITA L IN T E G R A TE D C IR C U IT S IL IC O N M O N O L ITH IC TC4532BP 8 - B I T P R I O R I T Y EN CODER TC4532BP is eight bit coder which detects "H" level of the highest order among eight input signals and outputs the corresponding signal position in

TXM RX 28 Receiver

Contextual Info: TLV320AD16 3.3-V INTEGRATED ADSL CODEC SLWS107 – JUNE 2000 D D D D D D Complete Discrete Multitone-Based Asymmetric Digital Subscriber Line Coder/coder Supports Full Rate ADSL and G.Lite Application in Both Echo Cancellation or FDM Modes Integrated 14-Bit Converter for

sr flip flop

Abstract: ICAN-6166 CD4017 divide by 60 counter cd4017 application CD4017A RCA-CD4017A cd4017 applications johnson decade counter application of i CD4017 CD4017
Contextual Info: CD4017A Types CMOS Decade Counter/Divider Plus 10 Decoded Decimal Outputs The R CA-CD4017A consists o f a 5-stage Johnson decade counter and an o u tp u t de­ coder w hich converts the Johnson binary code to a decimal number. Inputs include a C LO CK, a RESET, and a CLO CK IN H IB IT

difference between harvard architecture super harvard architecture and von neumann block diagram

Abstract: ACE1202 ACE12022 ACE12022B ACE1202B ACE1202L
Contextual Info: ACE1202 Product Family Arithmetic Controller Engine ACEx for Low Power Applications • Hardware Bit - Coder (HBC) (ACE1202-2 only) General Description ■ On-chip oscillator — No external components — 1µs instruction cycle time The ACE1202 (Arithmetic Controller Engine) family of

hm2004

Contextual Info: HUALON MICROELECTRONICS E4E D m m HM2004 ADM VOICE CODERIDECODER U 4STflD41 OODOOES 3 HM2050 VOICE SYNTHESIZER 1C Feature Feature * 28 pin DIP packa ge. * A sin gle c h ip LSI for vo ic e re co rd in g / reproducing. * Build in D-RAM interface with the ca p a city up

adpcm speech compression

Abstract: EZ 728 coder
Contextual Info: a G.728 DSP-BASED SPEECH COMPRESSION CODER A nalog Devices’ G.728 full-duplex speech compression coder, running on a highperformance 33 MIPS Digital Signal Processor DSP , compresses the speech or any other audio signal component of multimedia software or

TS5070

Abstract: TS5071 DIP20 PLCC28 TS5070FN TS5071N
Contextual Info: TS5070 TS5071 PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION COMPLETE CODEC AND FILTER SYSTEM INCLUDING : – TRANSMIT AND RECEIVE PCM CHANNEL FILTERS – µ-LAW OR A-LAW COMPANDING CODER AND CODER – RECEIVE POWER AMPLIFIER DRIVES 300 Ω – 4.096 MHz SERIAL PCM DATA max

coded mark inversion 1994

Abstract: MC100SX1230 MC100SX1230-D
Contextual Info: MOTOROLA Order this document from Logic Marketing SEMICONDUCTOR TECHNICAL DATA Advance Information MC100SX1230 CMI Coder/coder The MC100SX1230 device consists of a Binary to CMI Coder and CMI to Binary coder with integrated loop back capability. The device is

UDA1380

Abstract: UDA1380TT HVQFN32 TSSOP32 UDA1380HN SDC31 uda1380 board
Contextual Info: INTEGRATED CIRCUITS DATA SHEET UDA1380 Stereo audio coder-coder for MD, CD and MP3 Product specification Supersedes data of 2003 Apr 04 2004 Apr 22 NXP Semiconductors Product specification Stereo audio coder-coder for MD, CD and MP3 UDA1380 CONTENTS 1

CHN 530

Abstract: chn 723 chn 448 CHN 727 CS4125 CS4130 chn 711 TSMC sram1 CS4100 CS4110
Contextual Info: CS4100 ADPCM Speech Coders Virtual Components for the Converging World The CS4100 family of adaptive differential pulse code modulators ADPCMs is designed to provide high performance solutions for a broad range of applications requiring speech compression and decompression. These

RRUS 01 B1

Abstract: RRUS 01 B2 RRUS 32 b2 AD012 zoran zr RRUS 32
Contextual Info: ZSR A N ZR36031 IMAGE COMPRESSION CODER/CODER PRELIMINARY FEATURES • Performs scaling, quantization, and variable-length encoding/decoding for monochrome or color image data ■ Bit-rate control capability ■ 7.4 MHz I/O data rate ■ High accuracy: 16-bit 2's complement coefficients

MP-MLQ

Abstract: G.723. c code TMS320C62x TMS320C6000 codec723 TMS320C6000 intrinsics list C6000 G723 simulator encoder decoder cd 7231
Contextual Info: Application Report SPRA552A G.723.1 Dual Rate Speech Coder: Multichannel TMS320C6000 Implementation Thomas J. Dillon, Jr. C6000 Applications Abstract This application report describes how the G.723.1 Dual Rate Speech Coder has been implemented on the Texas Instruments TI TMS320C6000 digital signal processor (DSP).

59 PAA

Abstract: TMS320C6xx TXM RX 23 Receiver AD12 THS6012 THS6032 TLV320AD11A TLV320AD12A scr7 TXM RX 28 Receiver
Contextual Info: TLV320AD12A 3.3-V INTEGRATED ADSL CODEC SLWS088A – JULY 1999 – REVISED NOVEMBER 1999 D D D D D D D D Complete Discrete Multitone DMT -Based Asymmetric Digital Subscriber Line (ADSL) Coder/coder (Codec) Solution Complies With ANSI T1.413, Issue 2 and

Contextual Info: SEPTEMBER 1994 ADVANCE INFORMATION DS3511 - 2.2 VP2612 VIDEO MULTIPLEXER Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■

MCE6

Abstract: stereo audio switch
Contextual Info: UDA1384 Multichannel audio coder-coder Rev. 02 — 17 January 2005 Product data sheet 1. General description The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters ADC and 6 Digital-to-Analog Converters (DAC) with signal processing features employing

Contextual Info: QQQ ILC DATA DEVICE _ _ CORPORATION_ BUS-6510111 and BUS-6510211 MIL-STD-1553 DUMB RTU HYBRID FEATURES DESCRIPTION The BUS-6510111 MIL-STD-1553 Dum b Remote T erm inal U nit RTU consists of a transceiver, and en­ coder/coder, co n tro l logic, dual rank I/O registers and internal clock

DIP20

Abstract: PLCC28 TS5070 TS5070FN TS5070FNTR TS5071 TS5071N
Contextual Info: TS5070 TS5071 PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION COMPLETE CODEC AND FILTER SYSTEM INCLUDING : – TRANSMIT AND RECEIVE PCM CHANNEL FILTERS – µ-LAW OR A-LAW COMPANDING CODER AND CODER – RECEIVE POWER AMPLIFIER DRIVES 300 Ω – 4.096 MHz SERIAL PCM DATA max

Contextual Info: LS TTL DN74LS Series DN74LS139 DN74LS139 Dual 2 -lin e to 4 -lin e coders / Demultiplexers H Description P -2 D N 74LS139 contains tw o 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable input term inals. • Features

TLV320AIC22

Contextual Info: TLV320AIC22 DUAL VOIP CODEC SLAS281B – JULY 2000 – REVISED JUNE 2002 D D D D D D D D D D D Two 16-Bit Analog-to-Digital Converters ADC Two 16-Bit Digital-to-Analog Converters (DAC) Programmable Input/Output Gain Analog Crosspoint to Connect the Two Coder/coders (Codecs) to Any of the I/O

9600 baud rate converter

Abstract: AT85C51SND3B1 mv silicon Host MP3/WMA AT85C51SND3B AT85C51SND3B2 AT85RFD-07 LQFP100 NAND Flash controller ecc AAA BATTERY
Contextual Info: Features • Audio Processor • • • • • • • • • • • – Proprietary Digital Signal Processor – MP3 and WMA coders – WAV PCM and ADPCM coder/Coder with AGC – JPEG coder – Video Animation MTV up to 16fps Audio Codec – 16-bit Stereo D/A Converters(3)

Contextual Info: ^ Supertex inc. DC7 Programmable Data Coder Ordering Information Device 28-Pin Plastic DIP 28-Pin Plastic Quad J Lead 28-Pin SO Gullwing Die DC7 DC7P DC7PJ DC7WG DC7X Features General Description □ 8 data bits byte wide data □ 7 address bits (128 addresses)

Contextual Info: S E M I C O N D U C T O R 74VH C 138 3-to-8 D coder/D em ultiplexer General Description The VHC138 is an advanced high speed CMOS 3-to-8 DE­ CODER fabricated with silicon gale CMOS technology. It achieves the high speed operation similar to equivalent Bi­

Contextual Info: General Description Features The MIC4350 is a CMOS device combining the functions of an NBCD counter, four-bit latch, and a seven-segment de­ coder/driver. It provides up to 25 mA drive/segment capability for displays which require current sinking in the active mode.

93L21

Abstract: 93L12 93L21DMQB 93L21FMQB J16A W16A
Contextual Info: 93L21 jgg National mM Semiconductor 93L21 Dual 1-of-4 coder General Description Features The 93L21 consists of two independent multipurpose de­ coders, each designed to accept two inputs and provide four mutually exclusive outputs. In addition an active LOW