CK622P Search Results

R4383

Abstract: T400 clock TSWC03622 TSYN01622 TSYN03622 TSWC01622 TSWC02622
Contextual Info: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■

TRCV0112G

Contextual Info: Product Brief May 2001 TRCV0112G 12 Gbit/s Limiting Amp, Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ ■ ■ Integrated limiting amplifier with 40 dB of voltage gain. Fully integrated clock recovery, 1:16 data demultiplexer. Supports OC-192/STM-64 standard and multiple

GR-253

Abstract: TTRN0110G
Contextual Info: Data Sheet March 29, 2002 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features Applications Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction FEC rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s

CKT55

Contextual Info: DESCRIPTION FEATURES • Single chip source for 622.08M Hz and 155.52MHz clocks ■ 622.08M Hz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/C M O S com patible inputs and reference output ■ SONET com pliant jitter perform ance <0.01 Ul

ck77

Abstract: CK51 TADM04622
Contextual Info: Data Sheet, Revision 1 August 26, 2003 TSYN03622 SONET/SDH/PDH/ATM Clock Synthesizer 1 Introduction The last issue of this data sheet was June 20, 2003. A revision history is included in 21 Revision History on page 65. Red change bars have been installed on all text, figures,

Contextual Info: Preliminary Data Sheet May 2002 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with reduced jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching

Contextual Info: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection

T400 clock

Abstract: TSWC01622 TSWC02622 TSWC03622 TSYN01622
Contextual Info: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection

TADM042G5

Abstract: TDAT042G5 TSOT0410G TSWC02622 TTRN012G5
Contextual Info: Preliminary Product Brief February 2003 TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Fully integrated clock synthesis ■ Clock or system sync protection switching ■ Fast autonomous switching with software override

TMXF84622

Abstract: TADM04622 TDAT04622 TMXF28155 TSI-16 TSWC01622 TSWC03622 TSI-16 Card
Contextual Info: Preliminary Product Brief February 2003 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with looser jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching

10Gb CDR

Abstract: D14p N4 Amplifier 1 into 12 demultiplexer circuit diagram pin diagram 14 demultiplexer GR-253 TRCV0110G APD-SBSC-101
Contextual Info: Data Sheet March 28, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 8 mV sensitivity at 1 x 10–10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

T400 clock

Abstract: ATM machine working circuit diagram TSWC01622 TSWC02622 TSWC03622 TSYN01622 TSYN03622 L2E4
Contextual Info: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■

Contextual Info: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks Synergy's SY89426 M ulti-O utput Phase Locked Loop PLL is a SONET com pliant clock generator providing

Contextual Info: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output

GR-253

Abstract: TRCV0110G TRCV0110G-3-XE APD-SBSC-101
Contextual Info: Data Sheet June 7, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

T400 clock

Abstract: ck77 diagram TSWC01622 TSWC02622 TSWC03622 TSYN01622 ATM machine working circuit diagram CK51
Contextual Info: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection

024-HS

Abstract: CK19 STSI-144 TADM042G5 TDAT042G5 TMXF28155 TMXF84622 TSI-16 TSOT0410G TSYN01622
Contextual Info: Preliminary Product Brief February 05, 2003 TSYN01622 SONET/SDH/PDH/ATM Clock Synthesizer Features Description • Fully integrated clock synthesis ■ Supports a wide choice of SONET/SDH output clock frequencies: 622.08 MHz 51.84 MHz 34.368 MHz 19.44 MHz

SY89426

Contextual Info: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERG Y SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output

APD-SBSC-101

Abstract: GR-253 0364a
Contextual Info: Data Sheet September 17, 2002 TRCV0111G2 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

SY89426

Abstract: CK155 TA-NWT-000253
Contextual Info: SONET OC-12/OC-3 CLOCK SYNTHESIZER FEATURES ClockWorks SY89426 DESCRIPTION • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output

T400 clock

Abstract: TADM042G5 TDAT042G5 TSOT0410G TSWC01622 TSWC02622 TTRN012G5
Contextual Info: Data Sheet, Revision 1 August 26, 2003 TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch 1 Features The last issue of this data sheet was June 20, 2003. A revision history is included in 23 Revision History on page 70. Red change bars have been installed on all text, figures,

Contextual Info: * S O NET OC-12/OC-3 CLO C K SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output

Contextual Info: * Clockworks PRELIMINARY SY89426 SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Single-chip source for 622.08 and 155.52MHz clocks ■ 622 output Is differential PECL, 155 output Is single-ended PECL ■ TTL/CMOS-compatible Inputs and reference output

TTRN0110G

Abstract: Interface cross
Contextual Info: Product Brief August 2000 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features • ■ ■ ■ ■ ■ Fully-integrated 10 GHz clock synthesizer; 16:1 data multiplexer Supports standard OC-192/STM-64 data rate of 9.9532 GHz as well as FEC rate of 10.6642 GHz