CD001 Search Results

P826RC-5134N

Abstract: fm transmitter 5km Toko P826RC-5134N TDA7540B SBC 28.3 SIEMENS 7PSG TDA7540 TQFP80 Tv tuner Diagram LG RF MPX 2010 DP
Contextual Info: CD00108485 Rev 1.0 ACTIVE PAGE A AM/FM Car Radio Tuner IC with Stereo Decoder and Intelligent Selectivity System ISS Datasheet DOCUMENT HISTORY Version Rev 1.0 Initial Edocs version Release Date Change Qualifier Initial Release CD00108485 Rev 1.0 ACTIVE

Contextual Info: CD00108485 Rev 1.0 ACTIVE PAGE A AM/FM Car Radio Tuner IC with Stereo Decoder and Intelligent Selectivity System ISS Datasheet DOCUMENT HISTORY Version Rev 1.0 Initial Edocs version Release Date Change Qualifier Initial Release CD00108485 Rev 1.0 ACTIVE

sfe 5,5 ma

Abstract: CD3024 PD3024
Contextual Info: >rJ , J Am 29C?33/834 CMOS Parity Bus Transceivers PRELIMINARY > > 3 3 DISTINCTIVE CHARACTERISTICS • • • Low-power CMOS - ICC Static = 80 //A High-speed bidirectional bus transceiver for processor organized devices Error flag with open-collector output

CD3024

Abstract: PD3024 AM2S
Contextual Info: Am 29833A/834A - Am 29853A/854A Parity Bus Transceivers PRELIMINARY DISTINCTIVE CHARACTERISTICS High-speed bidirectional bus transceiver for processor organized devices Error flag with open-collector output Generates odd parity for all-zero protection Buffered direction three-state control

LM 8002

Abstract: amz8000 Z8001 crystal OSCILATOR 4mhz Z8000 Z8002 AmZ8
Contextual Info: i Am8127 < AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Four TTL-level clocks G enerates synchronized TTL com patible clocks at 16MHz, 2M Hz and 1MHz to drive memory circuits and LSI peripheral devices. An additional TTL clock is synchronized with the CPU high-level clock for

Am2963

Contextual Info: Am29833A/Am29853A/Am29855A Parity Bus Transceivers VSS86ZUJV/V8S86ZUIV/VSC86ZUIV DISTINCTIVE CHARACTERISTICS • High-speed bidirectional bus transceivers for processor organized devices - T-R delay = 6 ns typical - Rj-Parity delay = 9 ns typical • Error flag with open-collector output

AmZ8000

Abstract: CD0018
Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS High-drlve high-level clock output Special output provides clock signal matched to re­ quirements of AmZBOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Synchronized WAIT state and time-out controls

AM7990

Contextual Info: Am7990 Local Area Network Controller for Ethernet LANCE DISTINCTIVE CHARACTERISTICS • • • • • Compatible with Ethernet and IEEE-802.3 10Base5 Type A, and 10Base2 Type B, "C heapernet") Easily interfaced to 8086, 68000, Z8000*, LSI-II* microprocessors

Contextual Info: Am29C827/Am29C828 Am29C927/Am29C928 Am29C827/Am29C828 Am29C927/Am29C928 High-Performance CMOS Bus Buffers DISTINCTIVE CHARACTERISTICS • • • High-speed CMOS buffers and inverters - D-Y delay = 7 ns typical Low standby power JEDEC FCT-compatible specs

am2764

Contextual Info: 6086ZUIV/9086ZUJV Am29806/Am29809 6-Bit Chip Select Decoder 9-Bit Equal-to-Comparator DISTINCTIVE CHARACTERISTICS • • High-speed, expandable, 9-bit "equal-to" comparator Am29809 High-speed comparator with chip select decoder (Am29806) Multibus compatible, open-collector acknowledge

29c833

Abstract: 29C933 amd 955
Contextual Info: Am29C833/Am29C853/Am29C855 Am29C933/Am29C953/Am29C955 Am29C833/Am29C853/Am29C855 Am29C933/Am29C953/Am29C955 High-Performance CMOS Parity Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • High-speed CMOS bidirectional bustransceivers - T-R delay = 6 ns typical

AMD 20 PIN CERDIP

Abstract: AM2965/B2A
Contextual Info: Am2965/Am2966 Advanced Micro Devices Octal Dynamic Memory Drivers with Three-State Outputs DISTINCTIVE CHARACTERISTICS Controlled rise and fall characteristics Internal resistors provide symmetrical drive to HIGH and LOW states, eliminating need for external series

74LS399

Contextual Info: Arrt25LS09 Am25LS09 Quad Two-Input, High-Speed Register DISTINCTIVE CHARACTERISTICS • • • 4-bit register accepts data from one-of-two 4-bit input fields Edge triggered clock action Second sourced by T.l. as 54LS/74LS399 Am25LS D.C. parameters including:

amd 14 pin cerdip driver

Contextual Info: a Am2965/Am2966 Octal Dynamic Memory Drivers with Three-State Outputs Advanced Micro Devices DISTINCTIVE CHARACTERISTICS Controlled rise and fall characteristics Internal resistors provide symmetrical drive to HIGH and LOW states, eliminating need for external series

2B0365

Abstract: 74ls244 latch ic Z8127 z80 multibus Am286
Contextual Info: Am8163/Am8167 A m 816 3 /A m 816 7 Dynamic Memory Timing, Refresh and EDC Controllers DISTINCTIVE CHARACTERISTICS • Complete CPU to dynamic RAM control interface • R A S /M S E L/C A S Sequencer to eliminate delay lines • Complete EDC/data path controls for W ord/Byte read

AM25S09

Abstract: CD0017
Contextual Info: Am25S18 Am25S18 Quad D Register with Standard and Three-State Outputs DISTINCTIVE CHARACTERISTICS • • • • • Advanced Schottky technology Four D-type flip-flops Four standard totem -pole outputs Four three-state outputs 75M Hz clock frequency GENERAL DESCRIPTION

AM29800

Abstract: 0E-T2
Contextual Info: *9 - I.986ZUJV Am29861 - 6 4 High Performance Bus Transceivers DISTINCTIVE CHARACTERISTICS • • Three-state outputs glitch-free during power-up and down. Outputs have Schottky clam p to ground 48m A com m ercial Io l . 32m A military Io l Low in p u t/o u tp u t capacitance

Contextual Info: Am25LS2538 Am25LS2538 One-of-Eight Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Three-state decoder outputs Buffered com m on output polarity control Inverting and non-inverting enable inputs A. C. param eters specified over operating tem perature

D Flip Flops

Abstract: 74ls175 pin diagram 74ls376 4LS08 74LS175 LS08 AM2919 CD0017
Contextual Info: 80S~ISZUJV/Z0S~ISZU1V A m 25LS 07/A m 25LS08 Hex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • • 4-bit and 6-bit parallel registers Com m on Clock and Common Enable Positive edge triggered D flip flops Second sourced by Tl as 54LS/74LS37B and 379

Contextual Info: Am 29841A/Am 29843A/Am 29845A Am 29941A/Am 29943A/Am 29945A High-Performance Bus Interface Latches • • • High-speed parallel latches - transparent tpp - 5.0 ns typical Buffered common latch enable, clear and preset input Three-state outputs glitch-free during power-up and

bj 950 131- 6

Abstract: 74LS385 "serial adder" Am25LS14 serial adder AM25LS15PC bj 945 25ls22
Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • M a g n itu d e o n ly a d d itio n /s u b tra c tio n S e c o n d s o u rc e d b y T .l. a s A m 5 4 L S /7 4 L S 3 8 5 F o u r in d e p e n d e n t a d d e r/s u b tra c to rs

AM29833A

Contextual Info: ADVANCED MICRO DEVICES Tb T il 0 S S 7 SES DOEÖIS T 1 Am29833A/Am29853A/Am29855A T '53 31 Am29833A/Am29853A/Atn29855A Parity Bus Transceivers DISTINCTIVE CHARACTERISTICS High-speed bidirectional bus transceivers for processor organized devices - T-R delay- 6 ns typical

AM25S18PC

Abstract: am25s08 AF000710 CD0017
Contextual Info: Am25S18 Am25S18 Quad D Register with Standard and Three-State Outputs DISTINCTIVE CHARACTERISTICS • • • • • Advanced Schottky technology Four D-type flip-flops Four standard totem -pole outputs Four three-state outputs 75M Hz clock frequency GENERAL DESCRIPTION

LS2520

Abstract: Am26l-S2520
Contextual Info: Am25LS2520 Am25LS2520 Octal D-Type Flip-Flop with Clear, Clock Enable and Three-State Control DISTINCTIVE CHARACTERISTICS • • 8-bit, high-speed parallel register w ith positive edgetriggered, D-type flip-flops Am25LS Family offers improved sink current, source