AMZ8 Search Results

USING SCC WITH Z8000 IN SDLC PROTOCOL

Abstract: constant time delay Z8000 8086 interrupt structure WR1 marking code AmZ8 Z8531APC
Contextual Info: AmZ8031 • AmZ8531 ASCC A synchronous S e ria l C o m m u n icatio ns C o n tro ller DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • Tw o IM .b p s full duplex serial channels Each channel has independent oscillator, generator, and PLL for clock recovery, dramatically reducing the

LM 8002

Abstract: amz8000 Z8001 crystal OSCILATOR 4mhz Z8000 Z8002 AmZ8
Contextual Info: i Am8127 < AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Four TTL-level clocks G enerates synchronized TTL com patible clocks at 16MHz, 2M Hz and 1MHz to drive memory circuits and LSI peripheral devices. An additional TTL clock is synchronized with the CPU high-level clock for

AmZ8000

Abstract: CD0018
Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS High-drlve high-level clock output Special output provides clock signal matched to re­ quirements of AmZBOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Synchronized WAIT state and time-out controls

the pin function of ic 7405

Abstract: AMZ8016-DMA
Contextual Info: 9 L 0 8 Z U IV AmZ8016 DM A T ransfe r C o ntroller DISTINCTIVE CHARACTERISTICS • • • Two independent multi-function channels Automatic loading/reloading of control parameters by each channel Optional automatic chaining of operations Channel interleave operations

1a4 controller

Contextual Info: AmZ8165 • AmZ8166 Octal Dynamic Memory Drivers with Three-State Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Controlled rise and fall characteristics The AmZ8165 and AmZ8166 are designed and specified to drive the capacitive input characteristics of the address and control

AmZ8144

Abstract: AmZ8140 AmZ8140/44
Contextual Info: AmZ8140 • AmZ8144 Octal Three-State Buffers FUNCTIONAL DESCRIPTION DISTINCTIVE CHARACTERISTICS • • • • • • • • The AmZ8140 and AmZ8144 are octal buffers fabricated using advanced low -pow er Schottky technology. The 20-pin package provides improved printed circuit board density for use in m emory

AMZ8120

Contextual Info: AmZ8120 Octal D-Type Flip-Flop with Clear, Clock Enable and 3-State Control DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • • • • The A m Z 8 120 is an 8-b it register b u ilt using advanced LowPower S ch o ttky technology. The register consists o f eight

Contextual Info: AmZ8164 Dynamic Memory Controller ADVANCED INFORMATION DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Dynamic Memory Controller for 16K and 64K MOS dynamic RAMs • 8-Bit Refresh Counter for refresh address generation, has clear input and terminal count output

Contextual Info: AmZ8010 Memory Management Unit ADVANCED DATA DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • • • • • • The AmZ8010 Memory Management Unit MMU is a high formance, LSI product which adds sophisticated address ti lation and memory protection capabilities to AmZ8001

AmSYS29

Abstract: RBS 3106 DEC PDP-11 F-11 MACRO8000 LT 5226 Z8000 RBS 6600 AM8085 RBS 2109 manual book Zilog cross reference
Contextual Info: Advanced Micro Devices AmZ8000 User’s Manual ^1 ^ i . R ra m 'e Y lectron Advanced Micro Devices AmZ8000 User’s Manual The International Standard of Quality guarantees these electrical AQLs on all parameters over the operating tempera­ ture range: 0.1% on MOS RAMs & ROMs;

Contextual Info: A m Z 8165• A m Z 8166 Octal Dynamic Memory Drivers with Three-State Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Controlled rise and fall characteristics The AmZ8165 and AmZ8166 are designed and specified to drive the capacitive input characteristics of the address and control

Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Hlgh-drive high-level clock output Four TTL-level clocks Special output provides clock signal matched to re­ quirements of AmZSOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Generates synchronized TTL compatible clocks at

LSI MMU

Abstract: AD14 block diagram of 7 segment AD11 AD12 ti ad14 AmZ8001
Contextual Info: AmZ8010 M em ory M anagem ent Unit ADVANCED DATA DISTINCTIVE CHARACTERISTICS • • • • L o g ica l to P h y s ic a l a d d re s s translation D y n a m ic se g m e n t relocation 64 s e g m e n ts per M M U S e g m e n t s iz e s in d ivid u ally a s s ig n a b le from 2 5 6 to 6 4 K b y tes

sn04

Abstract: TTL IC 7405 z8001 AD0-AD15 Z8000 Z8002 Z8016
Contextual Info: D M A T ra n s fe r C o n tro lle r AmZ8016 AmZ8016 DISTINCTIVE CHARACTERISTICS • • Channel interleave operations Masked data pattern matching for search operations V ectored interrupts on selected transfer conditions Base registers fo r repetitive operations

Am9518

Abstract: Z8068 AM9518A F001300 AmZ8066
Contextual Info: 8908ZWV/81S6WV Am 9 5 1 8 / A m Z 8 0 6 8 Data Ciphering Processor DISTINCTIVE CHARACTERISTICS Encrypts and decrypts data Implements National Bureau of Standards standard data encryption algorithm. High-Speed Operation Am9518 and AmZ8068 throughput over 1.3 and 1.7M

z8010

Contextual Info: AmZ8010 ADVANCED MICRO DEVICES a Memory M anagem ent Unit Product Specification October 1980 DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • Complete Memory Management Function T he A m Z 8010 M em o ry M a n a g e m e n t U nit M M U is a highpe rfo rm an ce LSI pro du ct th a t adds sop histicated address tra n s ­

9513a

Abstract: ATA 2388 Z8073 BCD DIVISION M 3329 E1
Contextual Info: Am9513 A/AmZ8073A A m 9 5 1 3 A /A m Z 8 0 7 3 A System Timing Controller DISTINCTIVE CHARACTERISTICS Five independent 16-bit counters H igh speed counting rates U p/do w n and binary/B C D counting Internal oscillator frequency source Tapped frequency scaler

rfd5

Abstract: ge 5d3
Contextual Info: 8908ZUIV/81S6UJV Am9518/ AmZ8068 Data Ciphering Processor DISTINCTIVE CHARACTERISTICS T h re e se p a ra te k e y re g ist e rs o n -ch ip Separate registers for encryption key, decryption key and m aster key improve system security and throughput by eliminating need to reload keys frequently.

AmZ8103

Abstract: AmZ8104 AMZ8104DC
Contextual Info: AmZ8103 • AmZ8104 Octal Three-State Bidirectional Bus Transceivers DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • 8-bit bidirectional data flow reduces system package count • 3-state inputs/outputs for interfacing with bus-oriented systems PNP inputs reduce input loading

LM 8002

Abstract: z8000 AMZ8000
Contextual Info: Am8127 Am 8127 AmZ8000 D ock Generator DISTINCTIVE CHARACTERISTICS • Four TTL-tevel clocks Hlgh-drive high-level clock output Special output provides clock signal matched to re­ quirements of AmZ8000* CPU 4MHz and some 6MHz applcations . MMU and DMA devices.

Contextual Info: AmZ8031 • AmZ8531 ASCC Asynchronous S erial Communications Controller DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • Tw o IM .b p s full duplex serial channels Each channel has Independent oscillator, generator, and PLL for clock recovery, dramatically reducing the

Dynamic Memory Refresh Controller

Abstract: AMZ8127 AmZ8000
Contextual Info: AmZ8163 Dynamic Memory Timing, Refresh and EDC Controller DISTINCTIVE CHARACTERISTICS • • • • • Complete AmZ8000 CPU to dynamic RAM contol interface RAS/CAS Sequencer to eliminate delay lines Memory request/refresh arbitration Controls for Word/Byte read or write

am8085

Abstract: Dynamic Memory Refresh Controller
Contextual Info: AmZ8164 Dynamic Memory Controller ADVANCED INFORMATION DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Dynamic Memory Controller for 16K and 64K MOS dynamic RAMs • 8-Bit Refresh Counter for refresh address generation, has clear input and terminal count output

AMZ8000

Abstract: DF000380 AmZ8001/AmZ8002
Contextual Info: Am8127 Am8127 Am Z8000 C lo c k G e n e ra to r DISTINCTIVE CHARACTERISTICS High-drlve high-level clock output Special output provides clock signal matched to re­ quirements of AmZ8000* CPU 4MHz and some 6MHz applications , M MU and DMA devices. Synchronized WAIT state and time-out controls