AM8163 Search Results

2B0365

Abstract: 74ls244 latch ic Z8127 z80 multibus Am286
Contextual Info: Am8163/Am8167 A m 816 3 /A m 816 7 Dynamic Memory Timing, Refresh and EDC Controllers DISTINCTIVE CHARACTERISTICS • Complete CPU to dynamic RAM control interface • R A S /M S E L/C A S Sequencer to eliminate delay lines • Complete EDC/data path controls for W ord/Byte read

Contextual Info: Am8163/Am8167 Am8163/Am8167 Dynamic Memory Timing, Refresh and EDC Controllers DISTINCTIVE CHARACTERISTICS • • • • Complete CPU to dynamic RAM control Interface RAS/MSEL/óÀS Sequencer to eliminate delay lines Complete EDC/data path controls for Word/Byte read

str f 6167

Abstract: amz8127 str 6167 supi 3 ls z80b Am8001 AM8163 IC HS 8167 z80 multibus 74LS240
Contextual Info: Am8163/Am8167 A m 8 1 6 3 /A m 8 1 6 7 Dynamic Memory Timing, Refresh and EDC Controllers DISTINCTIVE CHARACTERISTICS EDC error flag latches for error logging under software control Two timing configurations support a broad range of processors Z80, Z8000, 8086, 8088, MC68000

am8160

Abstract: str f 6167 Amz8127 74LS240 MC68000 Z8000 Z80A Z80B 50lh 71p3ns
Contextual Info: Am8163/Am8167 Am 8163/Am 8167 Dynamic Memory Timing, Refresh and EDC Controllers DISTINCTIVE CHARACTERISTICS EDC error flag latches for error logging under software control Two timing configurations support a broad range of processors Z80, Z8000, 8086, 8088, MC68000

LM 8002

Abstract: amz8000 Z8001 crystal OSCILATOR 4mhz Z8000 Z8002 AmZ8
Contextual Info: i Am8127 < AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Four TTL-level clocks G enerates synchronized TTL com patible clocks at 16MHz, 2M Hz and 1MHz to drive memory circuits and LSI peripheral devices. An additional TTL clock is synchronized with the CPU high-level clock for

AmZ8000

Abstract: CD0018
Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS High-drlve high-level clock output Special output provides clock signal matched to re­ quirements of AmZBOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Synchronized WAIT state and time-out controls

Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Hlgh-drive high-level clock output Four TTL-level clocks Special output provides clock signal matched to re­ quirements of AmZSOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Generates synchronized TTL compatible clocks at

LM 8002

Abstract: z8000 AMZ8000
Contextual Info: Am8127 Am 8127 AmZ8000 D ock Generator DISTINCTIVE CHARACTERISTICS • Four TTL-tevel clocks Hlgh-drive high-level clock output Special output provides clock signal matched to re­ quirements of AmZ8000* CPU 4MHz and some 6MHz applcations . MMU and DMA devices.

AMZ8000

Abstract: DF000380 AmZ8001/AmZ8002
Contextual Info: Am8127 Am8127 Am Z8000 C lo c k G e n e ra to r DISTINCTIVE CHARACTERISTICS High-drlve high-level clock output Special output provides clock signal matched to re­ quirements of AmZ8000* CPU 4MHz and some 6MHz applications , M MU and DMA devices. Synchronized WAIT state and time-out controls

Z8000

Abstract: Z8001 Z8002 lm 8002 amz8000 Z8001 package HA 1166 Z8000 package size
Contextual Info: i Am8127 < AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Four TTL-level clocks G enerates synchronized TTL com patible clocks at 16MHz, 2M Hz and 1MHz to drive memory circuits and LSI peripheral devices. An additional TTL clock is synchronized with the CPU high-level clock for