CAS7 Search Results

CAS7D23

Contextual Info: LF Receiver Antenna CAS7D23 RoHS Description • Compact LF receiver antenna for X/Y axis. • Covered by plastic case. • Low profile. • L W H: 7.6 3.7 2.4 mm Max. • Product weight: 0.14g Ref. • RoHS compliance. x × × × Environmental Data • Operating temperature range: -40 ~+125

nc29

Abstract: VCC62 GND42 OUT15 c14 c13 IC TTL 7400 VCC15 NC11 NC20 CAS15
Contextual Info: <Value> HSP50215 FIFORDY A0 A1 GND34 A2 A3 A4 VCC38 A5 A6 A7 GND42 A8 A9 WR VCC46 CE RD RST SYNCIN OFM NC2 NC3 CASZ CAS0 CAS1 GND7 CAS2 CAS3 CAS4 NC11 CAS5 CAS6 CAS7 VCC15 GND16 REFCLK CAS8 CAS9 NC20 CAS10 CAS11 VCC23 CAS12 CAS13 CAS14 CAS15 NC28 NC29 NC30

Contextual Info: HYM64V1605GU-50/-60 HYM64V1645GU-50/-60 HYM72V1605GU-50/-60 HYM72V1645GU-50/-60 3.3V 16M x 64-Bit EDO-DRAM Module 3.3V 16M x 72-Bit EDO-DRAM Module 168pin unbuffered DIMM Module with serial presence detect • 168 Pin JE D E C Standard, Unbuffered 8 Byte Dual In-Line Memory Module

TME 87 0D

Contextual Info: SIEMENS 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module HYM64V8005GU-50/-60 HYM64V8045GU-50/-60 HYM72V8005GU-50/-60 HYM72V8045GU-50/-60 168pin unbuffered DIMM Module with serial presence detect * 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module

Contextual Info: SIEMENS 3.3V 8M x 64-Bit EOO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module HYM64V8005GU-50/-60/-70 HYM64V8045GU-50/-60/-70 HYM72V8005GU-50/-60/-70 HYM72 V8045G U-50/-60/-70 168pin unbuffered DIMM Module with serial presence detect Preliminary Information •

MD21-MD20

Abstract: OE23 SC15064 pc motherboard schematics
Contextual Info: J b . SIERRA æMICDNDUCTOR ' v PRODUCT BRIEF FALCON/64 Integrated 64-Bit GUI Accelerator SC15064 FEATURES Graphics Acceleration (hardware based) Bus Support BitBlt • Raster operations • VESA VL-BUS Line draw • PCI Local Bus ISA BUS Pattern fill

Contextual Info: STI644004UD1-60VG 168-PIN DIMMS 4M X 64 Bit DRAM DIM M with EDO and without Buffers FEATURES • GENERAL DESCRIPTION Performance range: ^RAC I ^CAC 60ns 15ns I rC ^HPC 104ns 25ns The Simple Technology STI644004UD1-60VG is a 4M x 64 bit Dynamic RAM high density memory module. The Simple

2561b

Abstract: CPU 314 IFM 8kx1 RAM cy17 ALI chipset fast page mode dram controller CY2254ASC-2 CY27C010 CY82C691 CY82C693
Contextual Info: PRELIM INARY CY82C691 Pentium hyperCache™ Chipset System Controller Features Supports mixed standard page-mode and EDO DRAMs Supports the VESA Unified Memory Architecture VUMA Support for standard 72-bit-wide DRAM banks Supports non-symmetrical DRAM banks

Contextual Info: O K I Semiconductor MSC23 T/P 1721 C -X X B S 2 0 1,048,576-Word x 72-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23T/D1721C-xxBS20 is a fully decoded 1,048,576-word x 72-bit CMOS Dynamic Random Access M emory M odule com posed of sixteen 4-Mb DRAMs 1M x 4 an d four 2-Mb

Contextual Info: TOSHIBA THL64V4075ATG-4,-5,-4S,-5S TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 4,194,304-WORD BY 64-BIT DYNAMIC RAM MODULE DESCRIPTION The THL64V4075ATG is a 4,194,304-word by 64-bit dynamic RAM module consisting of four TC5165165AFT/AFTS DRAMs on a printed circuit board. This module is optimized for applications

Contextual Info: «HYUNDAI HYM564404A K-Series Unbuffered 4M x 64-bit CMOS DRAM MODULE with EXTENDED DATA OUT _ DESCRIPTION The HYM564404A is a 4M x 64-bit EDO mode CMOS DRAM module consisting of sixteen HY5116404A in 24/26 pin SOJ or TSOP-II and one 2048 bit EEPROM on a 168 pin glass-epoxy printed circuit board. 0.1 nF and 0.01

Contextual Info: IBM11M2720Q 2M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for byte-write parity applications • System Performance Benefits: • 2Mx72 Dual Bank Fast Page Mode DIMM - • Performance: -60 -70 Buffered inputs except RAS, Data

Contextual Info: IBM11M2645H 2M x 64 DRAM MODULE Features System Performance Benefits: • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • 2Mx64 Extended Data Out Page Mode DIMM • Performance: -60 -70 -Buffered inputs except RAS, Data -Reduced noise (32 Vss/Vcc pins)

Contextual Info: 80960RP 1.0 1.2 ABOUT THIS DOCUMENT Terminology In this document, the following terms are used: This data sheet contains ADVANCE INFORMATION about Intel’s i960 RP processor, including a func­ tional overview, mechanical data package signal locations and simulated thermal characteristics ,

Contextual Info: IBM11N8845HB Preliminary 8M x 72 Super EOS Module Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 8Mx72 Extended Data Out Page Mode DIMMs • • Provides Chip-Kill ECC protection transparently to an existing Single Error Correction (SEC) system

Contextual Info: •HY U ND A I HYM572A414A F-Series Unbuffered 4M x 72-bit CMOS DRAM MODULE _ with EXTENDED DATA OUT DESCRIPTION T ie HYM572A414A is a 4M x 72-bit EDO mode CMOS DRAM module consisting of eighteen HY5117804B in 28/28 SOJ or TSOP-II and one 2048 bit EEPROM on a 168 pin glass-epoxy printed circuit board. 0.1nF and 0.01 ^F

Contextual Info: I = = = = ¥ = = = ’ = IB M 1 1 N 2 6 4 5 H IB M 1 1 N 2 7 3 5 H 2M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 2Mx64, 2Mx72 Extended Data Out Page Mode DIMMs applications • System Performance Benefits:

Contextual Info: IBM11N16735B IBM11N16645B IBM11N16735C IBM11N16645C 16M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 16Mx64.16Mx72 Extended Data Out Page Mode DÎMMs • Performance: -60 Wc [RAS Access Time tCAC

Contextual Info: IBM11T1645LP IBM11T1645NP 1M x 64 144 PIN SO DIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • Optimized for byte-write non-parity applications • System Performance Benefits: - Reduced noise 18 VSs/18VCc pins

Contextual Info: IBM11M1640L 1M X 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for byte-write non-parity applications • System Performance Benefits: -Buffered inputs except RAS, Data -Reduced noise (32 VSsA /cc P^s)

Contextual Info: IBM11M4640C 4M x 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • 4Mx64 Fast Page Mode DIMM • Performance: -60 -70 W c RAS Access Time 60ns 70ns fc A C CAS Access Time 20ns 25ns tA A Access Time From Address 35ns

siemens ecu

Abstract: siemens ecu 100 siemens ecu 64 ecu siemens 74ABT244
Contextual Info: SIEM EN S 1M x 64-Bit Dynamic RAM Module HYM 641010GS-60/-70 HYM 641020GS-60/-70 Prelim inary Inform ation • 1 048 576 words by 64-bit organization • Fast access and cycle time 60 ns access time 110 ns cycle time -60 version 70 ns access time 130 ns cycle time (-70 version)

mk48t18

Abstract: LSI53C1510 LSI53C895 LSI53C896 alaska ultra reference design schematics 20405 MFA D3318
Contextual Info: TECHNICAL MANUAL LSI53C1510 I2O-Ready PCI RAID Ultra2 SCSI Controller Version 2.2 April 2001 S14024.B This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

SO DIMM DRAM 144 Pin Connector Pinout

Abstract: SO DIMM 100 Pin Connector Pinout CB15 BA142
Contextual Info: cts. a h IC M A R D S rd fe u b U in P 8 6 1 168 Pin Unbuffered SDRAM DIMM Characteristics Basic Architecture SDRAM Addressing Effects The IBM 168 pin 8 Byte Unbuffered SDRAM DIMM is intended for personal computers and workstations using eight byte memory interfaces. These systems