CADIE Search Results

MIL-P-642A

Abstract: MIL-P-642
Contextual Info: PATCH CORDS 6 MOLDED CADIE ASSEMBLIES 1/4" TELEPHONE PATCH CORDS ANO MIL TYPE 1/4" PATCH COODS E : 7 7 3 79 2 -2 70 0 PATCH CORDS 8 MB1IH CAPTE ASSTMBLIES 1/4" TELEPHONE PATCH CORDS Switchcraft premium 3-conductor single patch cords are designed for rugged, noise-free performance. N ickel-plated

TB3M

Abstract: st605
Contextual Info: 1 n r n I PATCH CORDS & MOLDED CADIE ASSEMBLIES • 2501 MULTIPIN INTIRCOHNIGIDRS e/a ■■■H PHONE: 773 MOLDED CABLE ASSEMBLIES WITH MINIATURE, SHIELDED, MOLDED TINI Q-G® PLUGS ST YLE ST600 PATCH GORBS 6 C /3 Tini Q-G® miniature plugs offer 3- through 6-pin/contact

Contextual Info: contact layout Bestückungsplan - • - bestückt - assemble Coding Key CadierschLüssel /brillantblau. RAL 5007 / 5V “ " “ “ ' " " “ “ " “ “ ' “ “ " “ l e I II I I II I I I I I I I I I I I I I I I I I I I I I I I B !B d i ii i i ii i i

bubble memory

Abstract: driver 1028 TDA 1028 TPS 1028 NBM2011 "Barium Ferrite"
Contextual Info: November 1980 NBM2011 1M x 1 Magnetic Bubble Memory Device General Description The NBM2011 is a 1,048,576 220 bit magnetic bubble memory device. All required magnetic components, in­ cluding the drive field coils, permanent magnets and pro* tective magnetic shield are integral parts of the device. It

Contextual Info: Assem bly instructions To help facilitate proper cabie assembly and for convenience, a number of Assembly instructions are included m this catalog on the following pages. Please note that the specific Assembly Instruction which applies is indicated throughout the catalog with

cd 1191 acb

Abstract: crystal oscillator 8mhz ntk tl38a 82C356 SI-111J CS82310 387DX WK2C mip 2F3 82C351
Contextual Info: PEAK/DM Data Book February 1991 Copyright Notio« Software Copyright ê 1991, CHIPS and Technologies, Inc. Manual Copyright 1991, CHIPS and Technologies, Inc. All Rights Reserved. P tizüed in U.S.A. Trademarks PEAK , PEAK/DM™ and PEAK/5X™ are trademarks ofCHIPS and Technologies,

diodo sl r7

Abstract: TMs 1122 NL BC 1305 pin outs DIODO 6N c11 cpl 100 39p HBT 01 - 04G Intel486TM PROCESSOR FAMILY 6M91 INTEL I486 DX2 diodo s4 6n
Contextual Info: intei MILITARY ln t e l 486 TM PROCESSOR FAMILY • lntelDX4TM Processor — Up to 100-MHz Operation -S peed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

CADIE

Abstract: ACTUAL A-18
Contextual Info: Cycle Accurate Debug Interface v2.0 Developer Guide Copyright 2008-2009 ARM. All rights reserved. ARM DUI 0444D ID080709 Cycle Accurate Debug Interface v2.0 Developer Guide Copyright © 2008-2009 ARM. All rights reserved. Release Information Change history

XK power 22E

Abstract: slb 9635 tt 1.2 SLB 9635 TMs 1122 NL CU 212 SLB 9635 TT INTELDX4 write-through intel DX4 WHAT IS 485 PROTOCOL Intel486
Contextual Info: intei MILITARY l n t e l 486 TM PROCESSOR FAMILY • lntelDX4TM Processor — Up to 100-MHz Operation — Speed-Multiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

SC150C-60

Abstract: b257 ht103m SC150C-80-120 SC150C SC150C-100 SC150C-40 SC150C-80 D0024m thyristor 1200V
Contextual Info: THYRISTOR SC150C_ For general phase control applications such as speed controls, light controls and welders etc. • • • • General power use lT= I50A , It rms = 2 3 0 A High voltage up to 1200V High surge current of 3000A • Stud type •Maximum Ratings

A-18

Contextual Info: Cycle Accurate Debug Interface v2.0 Developer Guide Copyright 2008-2009 ARM. All rights reserved. ARM DUI 0444E ID031910 Cycle Accurate Debug Interface v2.0 Developer Guide Copyright © 2008-2009 ARM. All rights reserved. Release Information Change history

TRANSISTOR R 40 AH-16

Abstract: TEA 1091 TRANSISTOR AH-16 sparc v8 AD04M l xd 402 mf xd 402 mf STP1091-60
Contextual Info: Prelim inary SPARC Technology Business DATA SHEET D STP1091 _ February 1995 M u lti- C a c h e C ontroller Integrated Cache Controller for SuperSPARC escription The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021