C8051F12 Search Results

bank switch

Abstract: 22.1184 02BU c code for Sine Wave Generator using keil Sine Wave Generator using 8051 AN030 AN130 C8051F120 C8051F122 C8051F123
Contextual Info: AN130 C O D E B A N K I N G U S I N G T H E K E I L 8 0 5 1 TO O L S Relevant Devices This application note applies to the following devices: C8051F120, C8051F121, C8051F122, C8051F123, C8051F124, C8051F125, C8051F126, and C8051F127. Introduction The 8051 architecture supports a 64KB linear program memory space. Devices that have more than

CYGNAL c8051f124

Abstract: c8051f124 interface with 64k SRAM codes C8051F124 DS008 C8051F120DK 100-PIN RD2003 MCS51 programming adapter
Contextual Info: C8051F120/1/2/3 C8051F124/5/6/7 Preliminary High-Speed Mixed-Signal ISP FLASH MCU ANALOG PERIPHERALS - SAR ADC • 12-Bit C8051F120/1/4/5 • 10-Bit (C8051F122/3/6/7) • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-Ended or

C8051F125

Abstract: C8051F124DK
Contextual Info: C8051F125 50MIPS, 128K Flash, 12-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 12-bit ADC ±1LSB INL; No Missing Codes Programmable Throughput up to 100ksps Eight External Inputs; Programmable as Single-Ended or Differential Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

C8051F120DK

Abstract: C8051F120
Contextual Info: C8051F120 100MIPS, 128K Flash, 12-bit ADC, 100-Pin MCU PRELIMINARY SELECTED ELECTRICAL SPECIFICATIONS TA = -40°C to +85°C unless otherwise specified. PARAMETER CONDITIONS MIN TYP GLOBAL CHARACTERISTICS Supply Voltage 2.7 Supply Current CPU active Clock=100MHz

C8051F120DK

Abstract: C8051F121
Contextual Info: C8051F121 100 MIPS, 128 kB Flash, 12-Bit ADC, 64-Pin Mixed-Signal MCU Analog Peripherals High-Speed 8051 µC Core - 12-Bit ADC - ±1 LSB INL; no missing codes Programmable throughput up to 100 ksps 8 external inputs; programmable as single-ended or differential

CIP-51

Abstract: IR 126 D 24 c8051F120 UART0 sample program C8051F132
Contextual Info: High Speed 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of - Instruction Set in 1 or 2 System Clocks 100 MIPS or 50 MIPS Throughput with On-chip PLL 2-cycle 16 x 16 MAC Engine C8051F120/1/2/3 and C8051F130/1/2/3 Only Memory - 8448 Bytes Internal Data RAM (8k + 256)

C8051F120

Abstract: C8051F120 Target Board L51_BANK.A51 Silabs led blink with 8051 OMF-51 AN104 AN130 j24 connector C8051
Contextual Info: C8051F12x-DK C8051F12 X D E V E L O P M E N T K I T U S E R ’ S G U I D E 1. Kit Contents The C8051F12x Development Kit contains the following items: • • • • • • • • C8051F120 Target Board Serial Adapter RS232 to Target Board Debug Interface Protocol Converter

c8051F120 UART0 transmit and receive program

Abstract: C8051F120-GQ c8051F120 UART0 sample program Firmware ir 8500 C8051F13x C8051F131-GQ C8051F132-GQ C8051F130 Target Board Firmware ir 8500 cross CIP-51
Contextual Info: C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family Analog Peripherals - 10 or 12-bit SAR ADC - Programmable throughput up to 500 ksps 8 external inputs single-ended or differential Programmable amplifier gain: 4, 2, 1, 0.5 Two 12-bit DACs (‘F12x Only)

CIP-51

Abstract: c8051F120 datasheet c8051F120 UART0 sample program AN135 C8051F120 C8051F121 C8051F122 C8051F123 C8051F124 C8051F125
Contextual Info: AN135 C A C H E O P T I M I Z A T I O N S F O R C8051F12 X Relevant Devices Overview This application note applies to the following devices: The CIP-51 core implements a two stage pipeline for fetching and executing instructions. Figure 1 shows how the pipeline handles one and two cycle

C8051F120DK

Abstract: C8051F124
Contextual Info: C8051F124 50 MIPS, 128 kB Flash, 12-Bit ADC, 100-Pin Mixed-Signal MCU Analog Peripherals High-Speed 8051 µC Core - 12-Bit ADC - ±1 LSB INL; no missing codes Programmable throughput up to 100 ksps 8 external inputs; programmable as single-ended or differential

hirose 6 pin serial 9 pin

Abstract: CYGNAL c8051f124 hirose 6 pin serial 9 pin cable c8051f12x c8015 6 pin DC power connector L51_BANK.A51 C8051F124 C8051F120 Target Board led interface with 8051
Contextual Info: C8051F12x Development Kit User’s Guide 1. Kit Contents The C8051F12x Development Kit contains the following items: • • • • • • • • C8051F124 Target Board Serial Adapter RS232 to Target Board Debug Interface Protocol Converter Cygnal IDE and Product Information CD-ROM. CD content includes:

CIP-51

Abstract: c8051f130-g-q C8051F120-GQ C8051F124-GQ
Contextual Info: C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family Analog Peripherals - 10 or 12-bit SAR ADC - Programmable throughput up to 500 ksps 8 external inputs single-ended or differential Programmable amplifier gain: 4, 2, 1, 0.5 Two 12-bit DACs (‘F12x Only)

intel 8051 temperature ADC

Abstract: C8051F120DK C8051F123
Contextual Info: C8051F123 100MIPS, 128K Flash, 10-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 10-bit ADC ±1LSB INL; No Missing Codes Programmable Throughput up to 100ksps Eight External Inputs; Programmable as Single-Ended or Differential Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

C8051F120DK

Abstract: C8051F126
Contextual Info: C8051F126 50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU Analog Peripherals High-Speed 8051 µC Core - 10-Bit ADC - ±1 LSB INL; no missing codes Programmable throughput up to 100 ksps 8 external inputs; programmable as single-ended or differential

AN237

Abstract: C8051F120 C8051F121 C8051F122 C8051F123 C8051F124 C8051F125 C8051F126 C8051F127 C8051F130
Contextual Info: AN237 TCP/IP L I B R A R Y P R O G R A M M E R ’ S G U I D E Relevant Devices This application note applies to the following devices: C8051F120, C8051F121, C8051F122, C8051F123, C8051F124, C8051F125, C8051F126, C8051F127, C8051F130, C8051F131, C8051F132, C8051F133, C8051F020, C8051F021, C8051F022, C8051F023,

C8051F34* write to flash

Abstract: AN201 F020 F040 F120 F200 F300 F310 eeprom c8051f31x C8051F350
Contextual Info: AN201 WRITING TO FLASH FROM FIRMWARE Relevant Devices This application note applies to the following device families: C8051F00x, C8051F01x, C8051F02x, C8051F04x, C8051F06x, C8051F12x-13x, C8051F2xx, C8051F30x, C8051F31x, C8051F32x, C8051F326/7, C8051F33x, C8051F34x, and C8051F35x.

Contextual Info: C8051F123 100MIPS, 128K Flash, 10-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 10-bit ADC ! ±1LSB INL; No Missing Codes ! Programmable Throughput up to 100ksps ! Eight External Inputs; Programmable as Single-Ended or Differential ! Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

C8051F120TB

Abstract: C8051F040-TB C8051F020-TB C8051F02XTB C8051F060-TB AN171 C8051F120-TB C8051F060TB
Contextual Info: AN171 AB1 P R O T O T Y P I N G B O A R D U S E R ’ S G U I D E 1.0. Summary The AB1 prototyping board provides a 3 x 3.75" prototyping area 0.1" center through-hole with access to all MCU I/O signals. Access to I/O signals is provided by a 96-pin, high density connector that mates directly to the expansion connector of C8051F020-TB, C8051F040-TB, C8051F060-TB, and C8051F120-TB target boards. A 128 kB

Sine Wave Generator using 8051

Abstract: c8051F120 UART0 sample program AN043 AN143 C8051F120 C8051F121 C8051F122 C8051F123 C8051F124 C8051F125
Contextual Info: AN143 C O D E B A N K I N G U S I N G T H E TA S K I N G 8051 TO O L S Relevant Devices This application note applies to the following devices: C8051F120, C8051F121, C8051F122, C8051F123, C8051F124, C8051F125, C8051F126, and C8051F127. Introduction The 8051 architecture supports a 64KB linear program memory space. Devices that have more than

0xFd39

Abstract: 0X1680 0xB480 c8051F120 UART0 sample program C8051F124 C8051F125 C8051F126 C8051F127 0X185 0xb100
Contextual Info: AN142 FFT R O U T I N E S F O R T H E C8051F12 X F A M I L Y Relevant Devices This application note applies to the following devices: C8051F124, C8051F125, C8051F126, and C8051F127. multiplications, while the corresponding FFT requires only 192. Using this and other optimizations, an FFT can be calculated in a relatively short

7-DS12

Abstract: 100-PIN 8051 c programming examples C8051F120
Contextual Info: C8051F120/1/2/3/4/5/6/7 High-Speed Mixed-Signal ISP FLASH MCU Family ANALOG PERIPHERALS - SAR ADC • 12-Bit C8051F120/1/4/5 • 10-Bit (C8051F122/3/6/7) • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-Ended or

C8051F124DK

Abstract: C8051F127 50MIPS
Contextual Info: C8051F127 50MIPS, 128K Flash, 10-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 10-bit ADC ±1LSB INL; No Missing Codes Programmable Throughput up to 100ksps Eight External Inputs; Programmable as Single-Ended or Differential Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

C8051F120DK

Abstract: C8051F121
Contextual Info: C8051F121 100MIPS, 128K Flash, 12-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 12-bit ADC ±1LSB INL; No Missing Codes Programmable Throughput up to 100ksps Eight External Inputs; Programmable as Single-Ended or Differential Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

50-MIPS

Abstract: C8051F124DK C8051F127
Contextual Info: C8051F127 50MIPS, 128K Flash, 10-bit ADC, 64-Pin MCU PRELIMINARY ANALOG PERIPHERALS - - - 10-bit ADC ±1LSB INL; No Missing Codes Programmable Throughput up to 100ksps Eight External Inputs; Programmable as Single-Ended or Differential Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5