BUFFER 74 LS 04 Search Results

74AS573

Abstract: ls58 SN54ALS573B sn74als573b
Contextual Info: S N54ALS573B, SN54ALS580A, SN54AS573, SN54AS580 S N 74 A LS 5 7 3 B , S N 74ALSS80 A, S N 74 A S 5 7 3 , SN74AS580 O C TAL D-TYPE T R A N S P A R EN T LATC HES WITH 3-STATE OUTPUTS D 2 6 6 1 , DEC EM BE R 1 9 8 2 - 3-State Buffer-Type Outputs Drive Bus-Lines

HC 4066A

Abstract: CMOS 4001, 4011, 4070 and 4081 HC 4053A HC165A HC 4052A HC589A HC00A HC74A 4852A HC 125A
Contextual Info: BUFFERS/INVERTERS ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ

HBF4727A

Abstract: ZD 607 - triac ZD 607 - triac circuit hbf 4727a TDA3310 hbf4727 HBF4740 DTL-930 7-stage frequency divider BF479S
Contextual Info: / h o f t f o f m A T E ^SEMICONDUCTOR “ PRODUCTS 1979/80 I NT RODUCTI ON This publication aims to provide condensed information on the vast range of standard devices currently produced by SGS-ATES. For easy consultation the products have been divided into several sections according to the main product

1 bit full adder with carry

Abstract: 1-Bit full adder 1d1200a RS flip flop cmos
Contextual Info: MATRA MbE D M H S ES SfiböMSb Q Q Q Q S Ô 7 b SMMHS 'T - r X - MAY 1988 PRELIMINARY DATA SHEET OPEN ASIC MA GATE ARRAY SERIES - 3 M/ l METAL LAYER MA 0250 - MA 0400 - M A 0800 - M A 1200 H ATURSS • HIGH SPEED CMOS: 2 NS/GATE TYPICAL PROPAGATION DELAY • LOW CONSUMPTION:

RS flip flop IC

Abstract: internal structure of ic 4017 RS FLIP FLOP LAYOUT hc 7400 sentry 4017 equivalent toggle type flip flop ic
Contextual Info: MMMHS MA GATE ARRAY SERIES 3/J1 METAL LAYER ANATRA-HARRIS SEM ICO NDUCTO R MA 0250-MA 0400 MA 0800-MA 1200 JANUARY 1986 Features Description • HIGH SPEED CMOS : 2 NS/GATE TYPICAL PROPAGATION DELAY. • LOW CONSUMPTION : - STAND BY CURRENT 10 nA/GATE - OPERATING CURRENT

JD 1803

Abstract: jd 1803 IC jd 1803 data sheet SNV55LVDS31W SNV55LVDS32W jd 1803 data SMV320C6701GLPW14 54LS74A bistable multivibrator using ic 555 SNV54LVTH162245WD
Contextual Info: Mil Sel Guide 04-home-new.qxd R 8/11/2004 2:21 PM E A L W Page 1 O R L D S I G N A L P TM R O C E S S I N G Military Semiconductors Selection Guide 2004-2005 Mil Sel Guide 04-home-new.qxd 8/11/2004 2:21 PM Page 2 Table of Contents and Introduction Enhanced Plastic

0PIC

Abstract: LS66 SN74L30 84LS 64LS 84ls AX-2016 MAX2719 hy74 L8128A SN7463
Contextual Info: V 84 F A M IL Y S E R IE S 54 S E R IE S M L S S E R IE S B4S S E R IE S 74 S E R IE S 54H S E R IE S 74H S E R IE S 5 4 L 74 F A M IL Y S E R IE S 7 4 L S E R IE S 7 4 LS S E R IE S 74S *00. *04, *H 0 0 ,1404. *L00, 'U M , XSOO, *100, *S04, '10. *20, *30

FPT-80P-M01

Abstract: VR74 VR105
Contextual Info: cP April 1991 Edition 1.0 DATA SHEET = FUJI' - ' MB86490 CMOS AUTOMOBILE TELEPHONE AUDIO PROCESSOR The Fujitsu M886490 processes the baseband signal for automobile telephones for both AMPS United States and TACS (United Kingdom) systems. The MB86490 combines the control signal processing functions of the MB87084

LS575

Abstract: SN74ALS574 74AS574
Contextual Info: T YP E S S N 54ALS5 74, SN 54ALS5 75 . S N 5 4AS 5 74 , SN54AS575 S N 7 4 A L S 5 7 4 , S N 74 A L S 5 7 5 , S N 7 4 A S 5 7 4 , SN 74A S 5 75 O CTAL D T Y P E EDGE TRIGGERED FLIP FLOP S WITH 3-STATE OUTPUTS D 2661, JUNE 1982 —REVISED DECEMBER 1983 3-S tate Buffer-Type Noninverting Outputs Drive

74 hc 589

Abstract: 4by4 multiplexer 224 k 70 4-bit bidirectional shift register 74 194 54 fk
Contextual Info: LOGIC PRODUCT SPECTRUM TYPE 00 01 02 03 F U N C TIO N Quad 2-input N A N D 07 Quad 2-input N O R 54 54 AS BCT J,FK J,FK J,FK,W J,FK,W J,FK J,FK J,FK Quad 2-input N A N D with open-collector Hex inverter J,FK,W J,FK,W J,FK outputs J,FK J,FK J,FK,W J,FK,W Hex inverter with unbuffered outputs

ic 74198

Abstract: sn 74198 74198
Contextual Info: LOGIC SYMBOL 54/74198 3 DESCRIPTION FEATURES The “ 198” is a 8 -Bit B idirectio nal Universal Shift R egiste r useful in a w ide varie ty of a p ­ plications. As a high speed m ultifunctional sequential building block, it may be used in seria l-seria l, s eria l-pa rallel, pa rallel-se rial,

83ab

Abstract: PS/2 KEYBOARD CONTROLLER 80C51 keyboard controller TP8511
Contextual Info: TP8511HBE01 PS/2 Keyboard controller DataSheet Version: 1.0 Apr/2002 http://www.topro.com.tw 5 F, No.10, Prosperity Road 1, Science-Based Industrial Park, Hsinchu 300, Taiwan, R.O.C 300 新竹科學工業園區展業一路 10 號 5 樓 TPE: 5 F, No.27, Min Chuan W. Rd. Taipei 104, Taiwan, R.O.C

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package Extended commercial range o f - 4 0 ° C to + 8 5 °C

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package Extended commercial range o f - 4 0 ° C to + 8 5 °C

Contextual Info: 3.3V CMOS SINGLE GATE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT, 5 VOLT TOLERANT I/O D E S C R IP TIO N : FE A T U R E S : - 0.5 MICRON CMOS Technology ESD > 2000V per MlL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package

Contextual Info: 54LS/74LS299 LOGIC SYMBOL DESCRIPTION FEATURES The "299" Is an 8-Bit Bidirectional Universal S h ift/S to ra g e R e g iste r w ith a 3 -sta te bidirectional Input/Output port. The register has four operating modes: shift right, shift left, parallel load, and hold do nothing . The

Contextual Info: IDT74LVC1G126A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - This single bus buffer gate is built using advanced dual metal CMOS technology. The LVC1G126A is designed for 1.65V to 3.6V V cc operation and features independent line drivers

Contextual Info: IDT74LVC1G126A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - This single bus buffer gate is built using advanced dual metal CMOS technology. The LVC1G126A is designed for 1,65V to 3.6V V cc operation and features independent line drivers

Contextual Info: IDT74LVC1G125A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - The LVC1G125A single bus buffer gate is built using ad­ vanced dual metal CMOS technology. The LVC1G125A is de­ signed for 1,65V to 3.6V V cc operation and features indepen­

Contextual Info: IDT74ALVC1G07 ADVANCE INFORMATION 3.3V CMOS SINGLE GATE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT FE A T U R E S : D E S C R IP T IO N : - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; This buffer/driver is built using advanced dual metal CMOS te ch ­

40872

Contextual Info: IDT74ALVC1G06 ADVANCE INFORMATION 3.3V CMOS SINGLE GATE INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUT FE A T U R E S : D E S C R IP T IO N : - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; This buffer/driver is built using advanced dual metal CMOS te ch ­

Contextual Info: IDT74LVC1G125A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - The LVC1G125A single bus buffer gate is built using ad­ vanced dual metal CMOS technology. The LVC1G125A is de­ signed for 1,65V to 3.6V V cc operation and features indepen­

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package Extended commercial range of - 40°C to + 85°C

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O J m ïï. , D E S C R IP TIO N : FE A T U R E S : - IDT74LVC1G126A ADVANCE INFORMATION - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0