AT38L Search Results

Contextual Info: AT38LV256 Features • • • • • • • Low Power 25 mA Maximum Active 30 (iA Maximum (Standby) 3.3 V ± 10% Supply Fully Static: No Clock Required Two Control Inputs (CE and OE) TTL Compatible Inputs and Outputs 28-Pin SOIC Surface Mount Packages

Contextual Info: ATMEL 43 E D C OR P 3.074177 0001055 S I AT38LV64 - T - i/b -z z - I Z Features • • • • • • • • • • Fast Read A ccess Tim e - 200ns Low Power 110m W Maxim um A ctive at V cc = 3.0V 100|iW M axim um (S tandby) 2V Data Retention Fully Static: No C lock Required

Contextual Info: AT38LV64 Features • Fast Read Access Time - 200ns • Low Power HOmW Maximum Active at Vcc = 3.0V 100hW Maximum (Standby) • 2V Data Retention • Fully Static: No Clock Required _ • Three Control Inputs (CEi, CE2, andOE) • TTL Compatible Inputs and Outputs

Contextual Info: AT38LV256 Features • Low Power 25 mA Maximum Active 30 |iA Maximum (Standby) • 3.3 V± 10% Supply • Fully Static: No Clock Required • Two Control Inputs (CE and OE) • TTL Compatible Inputs and Outputs • 28-Pln SOIC Surface Mount Packages • JEDEC Pinout

Contextual Info: AT38LV256 Features • • • • • • • Low Power 25 mA Maximum Active 30 nA Maximum (Standby) 3.3 V ± 10% Supply Fully Static: No Clock Required Two Control Inputs (CE and OE) TTL Compatible Inputs and Outputs 28-Pin SOIC Surface Mount Packages

Contextual Info: AT38LV64 Features • Fast Read Access Time - 200ns • Low Power HOmW Maximum Active at V cc = 3.0V 100|xW Maximum (Standby) • 2V Data Retention • Fully Static: No Clock Required _ • Three Control Inputs (C E i,C E 2, and OE) • TTL Compatible Inputs and Outputs

Contextual Info: AT38LV256 Features • Low Power 25 mA Maximum Active 30 (iA Maximum (Standby) • 3.3 V± 10% Supply • Fully Static: No Clock Required • Two Control Inputs (CE and OE) • TTL Compatible Inputs and Outputs • 28-Pin SOIC Surface Mount Packages • JEDEC Pinout

CDM6264-1

Abstract: BR6264 CDM6264 com6264 AKM6264ALP-12L intel 6264 AKM6264ALP-12 AKM6264ALP-15 AKMB264ALP-15L AKMB264AP-12
Contextual Info: - 84 6 4 K -i X fäfSEfcH m s tt * CC CMOS -, TAAC max ns) TCAC max (ns) TOE max (ns) TOH min (ns) fTOD max (ns) > r T*P min (ns) S t a t i c & R A M ( 8 19 2 X 8 ) it TDS min (ns) TDH min (ns) TWD min (ns) Tvn max (ns) V D D or V C C (V) 2 8 P I N I DD