ASYNCHRONOUS UP AND DOWN COUNTER Search Results

Contextual Info: 54F190, 54F191 Signetics Counters 54F190 Asynchronous Presettable BCD/Decade Up/Down Counter 54F191 Asynchronous Presettable 4-Bit Binary Up/Down Counter Military FAST Products Product Specification FEATURES contains four master/slave flip-flops with internal gating and steering logic to

H136

Abstract: E136 SY100E136 SY100E136JC SY10E136 SY10E136JC SY10E136JCTR counter schematic diagram
Contextual Info: 6-BIT UNIVERSAL UP/DOWN COUNTER DESCRIPTION FEATURES 550MHz count frequency Extended 100E VEE range of –4.2V to –5.5V Look-ahead-carry input and output Fully synchronous up and down counting Asynchronous Master Reset Internal 75KΩ input pull-down resistors

counter schematic diagram

Abstract: H136
Contextual Info: 6-BIT UNIVERSAL UP/DOWN COUNTER DESCRIPTION FEATURES 550MHz count frequency Extended 100E VEE range of –4.2V to –5.5V Look-ahead-carry input and output Fully synchronous up and down counting Asynchronous Master Reset Internal 75KΩ input pull-down resistors

4000B

Abstract: 4192B 4193B n4193b clock down
Contextual Info: 4192B 4193B INTERNATIONAL, INC. CMOS PRESETTABLE UP-DOWN COUNTERS Dual Clock with Reset FEATURES: APPLICATIONS: • Individual clock lines for counting up or counting down ■ Synchronous high-speed carry and borrow propagation delays for cascading ■ Asynchronous reset and preset

TC4516BP

Abstract: TC4516BF
Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4516BP/BF TC4516BP/TC4516BF PRESETTABLE BINARY UP/DOWN COUNTER TC4516BP/BF is UP/DOWN 4 bit binary counter having asynchronous and PRESET functions. When RESET input is set to "H" level, the content of

HCF40192B

Abstract: HCF40192BEY HCF40192BM1 HCF40192M013TR PO13H up down counter truth table
Contextual Info: HCF40192B PRESETTABLE UP/DOWN COUNTER DUAL CLOCK WITH RESET BCD TYPE • ■ ■ ■ ■ ■ ■ ■ ■ ■ INDIVIDUAL CLOCK LINES FOR COUNTING UP OR COUNTING DOWN SYNCHRONOUS HIGH-SPEED CARRY AND BORROW PROPAGATION DELAYS FOR CASCADING ASYNCHRONOUS RESET AND PRESET

74ac190

Abstract: 74AC MC74AC190 p210n
Contextual Info: MC74AC190 Up/Down Counter with Preset and Ripple Clock UP/DOWN COUNTER WITH PRESET AND RIPPLE CLOCK The MC74AC190 is a reversible BCD 8421 decade counter which features synchronous counting and asynchronous presetting. The preset feature allows the MC74AC190 to be used in programmable dividers. The Count Enable input,

TC4516BP

Abstract: TC4516
Contextual Info: TC4516BP/BF C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4516BP/TC4516BF PRESETTABLE BINARY UP/DOUH COUNTER TC4516BP/BF is UP/DOWN 4 bit binary counter having asynchronous and PRESET functions. When RESET input is set to "H" level, the content of

Contextual Info: CD74HC191, CD74HCT191 Semiconductor High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters August 1997 Features Description • Synchronous Counting and Asynchronous Loading The Harris C D 74H C 191, and CD 74H CT191 are asynchronously presettable BCD Decade and Binary

TC4510BP

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4510BP/BF TC4510BP/TC451OBF PRESETTABLE BCD UP/DOHN COUNTER TC4510BP/BF is UP/DOWN decade counter having asynchronous RESET and PRESET functions. When RESET input is set to "H" level, the content of counter is reset to "0" and when RESET is set to "L"

74ALS193

Abstract: MR 1501 RT 1601 a LCD MS-012-AB 74ALS N74ALS193D N74ALS193N SOL-24
Contextual Info: Signetics 74ALS193 Counter Synchronous Presettable 4-Bit Binary Counter With Seperate Up and Down Clocks Preliminary Specification ALS Products TYPE TYPICAL f M*x TYPICAL SUPPLY CURRENT TOTAL FEATURES • Synchronous, reversible counting • Asynchronous parallel load capa­

AM25LS2569

Contextual Info: Four-Bit Up/Down Counters with Three-State Outputs DISTINCTIVE CHARACTERISTICS 4-bit synchronous counter, synchronously programmable Both synchronous and asynchronous clear inputs Three-state counter outputs interface directly with bus organized systems Internal look-ahead carry logic and two count enable

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

g717

Abstract: CTRDIV16 EN10 SN54ALS569A SN74ALS568A SN74ALS569A SN74ALS569
Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

CTRDIV16

Abstract: EN10 SN54ALS569A SN74ALS568A SN74ALS569A Synchronous 4-Bit Counters
Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

SNJ54ALS569AJ

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

Contextual Info: SN54ALS569A, SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS SDAS229A – APRIL 1982 – REVISED JANUARY 1995 The clear function is initiated by applying a low level to either asynchronous clear ACLR or

54F191DM

Abstract: 54F191FM 74F191PC 74F191SC 74F191SJ F191 J16A M16A M16D N16E
Contextual Info: National Semiconductor & 54F/74F191 Up/Down Binary Counter with Preset and Ripple Clock General Description Features The ’F191 is a reversible modulo-16 binary counter featur­ ing synchronous counting and asynchronous presetting. The preset feature allows the ’F191 to be used in program­

Contextual Info: & November 1994 54F/74F191 Up/Down Binary Counter with Preset and Ripple Clock General Description The ’F191 is a reversible modulo-16 binary counter featur­ ing synchronous counting and asynchronous presetting. The preset feature allows the ’F191 to be used in program­

74F191

Abstract: 74F191PC 74F191SC 74F191SJ M16A M16D MS-001 N16E
Contextual Info: 74F191 Up/Down Binary Counter with Preset and Ripple Clock Features General Description • High-Speed—125MHz typical count frequency The 74F191 is a reversible modulo-16 binary counter featuring synchronous counting and asynchronous presetting. The preset feature allows the 74F191 to be used

AS211C

Abstract: AS-211C
Contextual Info: SN54ALS193A, SN74ALS193A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS WITH DUAL CLOCK AND CLEAR S D AS211C - DECEMBER 1982 - REVISED JULY 1996 • Look-Ahead Circuitry Enhances Cascaded Counters • Fully Synchronous in Count Modes • Parallel Asynchronous Load for Modulo-N