CD401 Search Results

D4013B

Abstract: cd4013be D4013
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS023D − Revised April 2005 The CD4013B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes),

CD4011UB

Abstract: CD4011UBE CD4011UBEE4 CD4011UBF CD4011UBM CD4011UBM96 CD4011UBM96E4 CD4011UBM96G4 CD4011UBME4 CD4011UBMG4
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS022D – Revised September 2003 The CD4011UB types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes),

CD4017BE

Abstract: CD4017BN 89270AKB3T CD4017B CD4017BEE4 CD4017BF CD4017BF3A CD4017BF3AS2534 CD4017BM CD4017BM96
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS027C − Revised February 2004 ripple-clock the succeeding device in a multi-device counting chain. The CD4017B and CD4022B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic package

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS097C – Revised July 2003 The CD40106B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, M96,

CD40105BMS

Abstract: IOH15
Contextual Info: CD40105BMS CMOS FIFO Register December 1992 Features Description • 4 Bits x 16 Words CD40105BMS is a low-power first-in-first-out FIFO “elastic” storage register that can store 16 4-bit words. It is capable of handling input and output data at different shifting rates. This

74147 encoder

Abstract: ttl 74147 74147 datasheet 74147 CD40147B CD40147BE CD40147BEE4 CD40147BM CD40147BM96 CD40147BM96E4
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS102C − Revised October 2003 The CD40147B CMOS encoder features priority encoding of the inputs to ensure that only the highest-order data line is encoded. Ten data input lines 0-9 are encoded to four-line

74LS

Abstract: CD4017BM
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 10/09/95 Last Update Date: 05/19/98 Last Major Revision Date: 03/04/98 CD4017BM-X REV 1A0 DECADE COUNTER/DIVIDER WITH 10 DECODE OUTPUTS General Description The CD4017BM is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry

r2s3

Abstract: CD40192B CD40192BMS CD40193B CD40193BMS
Contextual Info: CD40192BMS CD40193BMS CMOS Presettable Up/Down Counters Dual Clock With Reset December 1992 Features Description • CD40192BMS - BCD Type CD40192BMS Presettable BCD Up/Down Counter and the CD40193BMS Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated “D” type flip-flops connected as a counter. The inputs consist of 4 individual jam lines,

CD40192B

Abstract: CD40193B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS106A – Revised March 2002 The CD40192B and CD40193B types are supplied in 16-lead hermetic dual-in-line ceramic packages D and F suffixes , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline package (NSR suffix),

CD4009UB

Abstract: CD4010B MS-001 MTSS001C
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS020B – Revised February 2003 The CD4009UB and CD4010B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, and NSR

cd40118

Abstract: applications of CD4018B CD4018 RCA-CD4018B CD4018B CD4018B Types 15-V CD4011B
Contextual Info: CD4018B Types CM OS Presettable Divide-By-'N’ Counter High-Voltage Types 2 0 -V o lt Rating The R C A -C D 4 0 1 8 B ty p e s c o n s is t of 5 J o h n s o n -C o u n te r stages, b u ffe re d Q o u tp u ts f r o m each stage, an d c o u n te r preset c o n tr o l

RCA-CD40115

Abstract: cd40115 cmos and ttl circuit design ttl to cmos converter
Contextual Info: Preliminary Data CD40115 CMOS High-Speed 8-Bit Bidirectional CMOS/TTL interface Features: Level Converter • Eight inverting channels with 5 V -to-12V The R CA-C D 40115 is a high-speed 8 -bit integrated c irc u it designed to interface CMOS logic levels w ith T T L logic levels o n the data

cd40178

Abstract: pin diagram CD4017 CD4017 divide by 60 counter CD4017B cd4017 application CD4017 PIN DIAGRAM CD4017 sr flip flop operation of CD4017B ICAN-6166
Contextual Info: CD4017B, CD4022B Types CMOS Counter/Dividers High-Voltage Types 2 0 -V o lt Rating C D 4 0 1 7 B —Decade Counter w ith 10 Decoded O utputs C D 4 0 2 2 B —O ctal Counter w ith 8 Decoded O utputs The R C A -C D 4 0 1 7 B and C D 4 0 2 2 B are 5stage and 4-stage Joh n so n c o u n te rs having

CD4019B

Abstract: 15-V
Contextual Info: CD4019B Types Features: CMOS Quad AND/OR Select Gate • Medium-speed op eration . High-Voltage Types 20-Volt Rating The RCA-CD4019B types consist o f fo u r A N D /O R select gate configurations, each consisting o f tw o 2-in p u t A N D gates driving

CD40103

Abstract: CD40102B CD40103B MS-001 MTSS001C cd40102
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS095B – Revised July 2003 The CD40102B and CD40103B types are supplied in 16-lead dual-in-line plastic packages E suffix , 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4011B

Abstract: CD4012B CD4023B MS-001 CD4012
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS023B – Revised February 2003 The CD4013B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, M96, and NSR suffixes), and

CD4009UB

Abstract: CD4010B MS-001 MTSS001C
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS020C − Revised October 2003 The CD4009UB and CD4010B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR

CD40117B

Abstract: MS-001 MTSS001C
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS101C – Revised September 2003 The CD40117B types are supplied in 14-lead dual-in-line plastic packages E suffix , 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline

CD4018B

Abstract: applications of CD4018B DIVIDE-BY-N COUNTER trigger
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS028A – Revised March 2002 The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages D and F suffixes , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline package (NSR suffix), and in chip form (H suffix).

cd40111

Abstract: FUNCTIONAL DIAGRAM OF CD4011 TI CD4023UB mas 6 rca 15-V CD4011UB CD4012UB CD4023UB RCA-CD4011UB
Contextual Info: CD4011UB, CD4012UB, CD4023UB Types CM OS NAND Gates High-Voltage Types 2 0 -V o lt Rating Features: • Quad 2 In p u t — C D 4 0 1 1 U B Dual 4 In p u t — C D 4 0 1 2 U B Trip le 3 In p u t — C D 4 0 2 3 U B ■ ■ The R C A -C D 4 0 1 1 U B , C D 4 0 1 2 U B , and

level shifter from TTL to CMOS

Abstract: ttl to cmos converter level shifter . CMOS to TTL cmos and ttl circuit design level shifter from TTL to CMOS bidirectional ttl cmos CD40116
Contextual Info: CD40116 Types CMOS High-Speed 8-Bit Bidirectional CMOS/TTL Interface Level Converter Features: • ■ E ight in ve rtin g channels with conversion from V n n to V c c o r Vq c to Vq d 4 V < V d d < 12 V a n d 4 V < \ ' c C < .V d d Three operating modes:

Contextual Info: CD4019BC,CD4019BM CD4019BM CD4019BC Quad AND-OR Select Gate Literature Number: SNOS360A CD4019BM CD4019BC Quad AND-OR Select Gate General Description Features The CD4019BM CD4019BC is a complementary MOS quad AND-OR select gate Low power and high noise margin

Applications of priority encoder 74147

Abstract: 16 line to 4 line priority encoder BCD priority encoder ttl 74147 4 line to 2 line priority encoder 16 to 4 priority encoder 74147 Texas Instruments TTL data book
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS102A – Revised March 2002 The CD40147B CMOS encoder features priority encoding of the inputs to ensure that only the highest-order data line is encoded. Ten data input lines 0-9 are encoded to four-line