AND8173 Search Results

CML ECL termination

Abstract: AND8173 AND8020
Contextual Info: AND8173/D Termination and Interface of On Semiconductor ECL Devices With CML Current Mode Logic OUTPUT Structure http://onsemi.com APPLICATION NOTE By Paul Shockman Contents SECTION 1.UNLOADED CML VOLTAGE LEVELS (DC OPEN) SECTION 2.DIRECT CONNECT (DC) CML LOAD

AND8020

Abstract: CML ECL termination Z0 127 TRANSISTOR equivalent
Contextual Info: AND8173/D Termination and Interface of ON Semiconductor ECL Devices With CML Current Mode Logic OUTPUT Structure http://onsemi.com APPLICATION NOTE By Paul Shockman Introduction Contents SECTION 1.UNLOADED CML VOLTAGE LEVELS (DC OPEN) SECTION 2.DIRECT CONNECT (DC) CML LOAD

485G

Abstract: NB7L14M NB7L14MMNG NB7L14MMNR2G
Contextual Info: NB7L14M 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for

Contextual Info: NB4N840M 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination http://onsemi.com MARKING DIAGRAM Description The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for

485G

Abstract: AND8173 NB7L86M NB7L86MMN
Contextual Info: NB7L86M 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination The NB7L86M is a multi−function differential Logic Gate, which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high

485G

Abstract: EP11 NB7L11M
Contextual Info: NB7L11M 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L11M is a differential 1−to−2 clock/data distribution chip with internal source termination and CML output structure, optimized

Contextual Info: NB7L11M Product Preview 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination The NB7L11M is a differential 1−to−2 clock/data distribution chip with internal source termination and CML output structure, optimized

Contextual Info: NB7L1008M 2.5V / 3.3V 1:8 CML Fanout Multi−Level Inputs w/ Internal Termination Description http://onsemi.com The NB7L1008M is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008M produces eight identical output copies of Clock or Data operating up to 6 GHz or 10.7 Gb/s, respectively. As

Contextual Info: NB7L14M 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for

Contextual Info: NB7L11M 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L11M is a differential 1−to−2 clock/data distribution chip with internal source termination and CML output structure, optimized

Contextual Info: NB7L86M 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination The NB7L86M is a multi−function differential Logic Gate, which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high

Contextual Info: XOCLCC6EVB Crystal Clock Oscillator Module Evaluation Board User's Manual for NBX Family in 6 Pin CLCC 5 mm x 7 mm Package http://onsemi.com EVAL BOARD USER’S MANUAL Generic Evaluation Board: XOCLCC6EVB Devices: NBXxxxx Description Evaluation Board Manual Document Features

485G

Abstract: NB7L14M NB7L14MMN NB7L14MMNG
Contextual Info: NB7L14M 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for

NBXDDA016LN1TAG

Abstract: NBXDDA016LNHTAG
Contextual Info: NBXDDA016, NBXDDB016 3.3 V, 133.33 MHz /137.93 MHz Dual Frequency CML Clock Oscillator The NBXDDB016/NBXDDA016 dual frequency crystal oscillator XO is designed to meet today’s requirements for 3.3 V CML clock generation applications. The device uses a high Q fundamental crystal

Contextual Info: NB7L14M Product Preview 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for

QFN-32 footprint

Abstract: QFN32* socket NB7L1008MMNG PRBS23 QFN32
Contextual Info: NB7L1008M 2.5V / 3.3V 1:8 CML Fanout Multi−Level Inputs w/ Internal Termination Description http://onsemi.com The NB7L1008M is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008M produces eight identical output copies of Clock or Data operating up to 6 GHz or 10.7 Gb/s, respectively. As

QFN-16

Abstract: 485G EP11 NB7L11M
Contextual Info: NB7L11M 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L11M is a differential 1−to−2 clock/data distribution chip with internal source termination and CML output structure, optimized

PS2018

Contextual Info: NB4N840M 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination http://onsemi.com MARKING DIAGRAM Description The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for

20CML

Contextual Info: NB7L86M 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination The NB7L86M is a multi−function differential Logic Gate, which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high

QB-300

Abstract: qfn16 socket
Contextual Info: NB7V52M Product Preview 1.8V / 2.5V Differential Data/Clock D Flip-Flop w/ Reset and CML Outputs http://onsemi.com Multi-Level Inputs w/ Internal Termination Description The NB7V52M is a 10GHz differential Data and Clock D flip-flop with a Differential asynchronous Reset. The differential D/Db, CLK/CLKb and

Contextual Info: NB7L86M 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination The NB7L86M is a multi−function differential Logic Gate, which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high

MAX3840

Abstract: NB4N840M QFN32 SY55859L NB4N840MMNG
Contextual Info: NB4N840M 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination http://onsemi.com MARKING DIAGRAM Description The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for

NBXDDA016LN1TAG

Contextual Info: NBXDDA016, NBXDDB016 3.3 V, 133.33 MHz /137.93 MHz Dual Frequency CML Clock Oscillator The NBXDDB016/NBXDDA016 dual frequency crystal oscillator XO is designed to meet today's requirements for 3.3ĂV CML clock generation applications. The device uses a high Q fundamental crystal

AM0393-320R

Abstract: IPC-A-600E MIL-P-55110D MIL-P-55110-D PCB BOARD DIMENSION BY SMA CONNECT AN8020 casey C0603C104K4RAC HP6624A marking code C3 SMD ic
Contextual Info: XOCLCC6EVB Crystal Clock Oscillator Module Evaluation Board Manual for NBX Family in 6 Pin CLCC 5mm X 7mm Package http://onsemi.com Generic Evaluation Board: XOCLCC6EVB Devices: NBXxxxx Prepared by: Senad Lomigora, Casey Stys and Paul Shockman Description