ADDR Search Results

Contextual Info: SN54ALS29823, SN74ALS29823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS S D A S 1 4 6 B -J A N U A R Y 198« - R EVISED JANUARY 1995 Functionally Equivalent to AMD’s AM29823 Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With

Contextual Info: SN74ALS2541 OCTAL UNE DRIVERS/MOS DRIVERS WITH 3-STATE OUTPUTS JU NE 1984 - REV ISED M A Y 19M 3-Stata Outputs Drive Bus Lina« or Buffar Memory Address Registers • S N 7 4 A L S 2 S 4 1 . . D W O H N P A C K A G E T O P V IE W P-N-P Inputs Reduce D-C Loading

Contextual Info: UT54ACS541/UT54ACTS541 Radiation-Hardened Octal Buffers & Line Drivers, Three-State Outputs FEATURES • Three-state outputs drive bus lines or buffer memory address registers • l.2\i radiation-hardened CMOS - Latchup immune • High speed • Low power consumption

Contextual Info: SN74LVC137 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH ADDRESS LATCHES SCAS340 - MARCH 1994 » EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V o lp (Output Ground Bounce) D, DB, OR PW PACKAGE (TOP VIEW) A[ B[ c[ Ü2A [ S2B[ G1[

74170

Abstract: OF IC 74170
Contextual Info: TTL MSI TYPES SN54170, SN54LS170. SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLtECTOR OUTPUTS B U L L E T IN N O , D L -S 7 6 1 1 3 4 9 , M A R C H 1 9 7 4 — R E V IS E D O C T O B E R 1 9 7 6 • Separate Read/Write Addressing Permits Simultaneous Reading and Writing

Contextual Info: SN54ALS1244A, SN74ALS1244A OCTAL BUFFERS AND DRIVERS WITH 3-STATE OUTPUTS SD A S1B 6B-JU LY 1990-R E V IS E D JANUARY 1995 Low-Power Versions of 'ALS244 Series 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading

Contextual Info: SN74AS821A, SN54AS821 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS D2825, D E C E M B E R 1983 - R E V IS E D JA N U A R Y 1986 • Functionally Equivalent to AMD's AM29821 Provides Extra Data Width Necessary for Wider Address/Data Paths or Buses with

Contextual Info: SN74F2244 25Q OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS _ SDFS095 - NOVEMBER 1993 • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers * Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic

74AC11827

Contextual Info: 54AC11827, 74AC11827 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0155— 0 3 3 7 9 . NOVEMBER 1989— REVISED MARCH 1990 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers 54AC11827 . . . JT PACKAGE 74AC11827 . . . DW OR NT PACKAGE TOP VIEW

D2957

Contextual Info: 54AC11241, 74AC11241 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS I_ • ■ I I I D2957, JULY 1987-R E V IS E D APRIL 1993 * 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations

Contextual Info: INTRODUCTION Today's portable and battery-operated system designer is faced w ith the problem of keeping ahead when addressing system perform ance, long battery life, in terfacin g te ch n o lo gy, and reliability. Toshiba's low vo lta g e high perform ance C2MOS logic fam ilies help designers achieve these goals.

Contextual Info: TOSHIBA 2. TM P68000 / 68HCOOO DATA ORGANIZATION AND ADDRESSING CAPABILITIES T h is section contain s a descriptio n of the re g is te rs and the d a t a o rganization of the TM P68000. 2.1 O P E R A N D S IZ E O peran d sizes are defined a s follows: a byte e q u a ls 8 bits, a word e q u a ls 16 bits, and a

Contextual Info: A ♦ WJ TRI-MAG, Inc. ^ .A lii y „ P O W E R Specialists 1601 N. Clancy, Visalia, CA 93291 209 651-2222 Fax (209) 651-0188 ITT Telex Num ber: 4994462 Cable Address: "T R IM A G " 960ZW SERIES 10 Watt DC-DC CONVERTER 2 :1 W id e R a n g e In p u t FEATURES

Contextual Info: | n 1601 N. Clancy, Visalia, CA 93291 209 651-2222 Fax (209) 651-0188 IT T Telex Number: 4994462 Cable Address: " TRIM AG" « Br ln > l| IllCa ^ ^ ^ y O ll^ POWER Specialists TDC7 SERIES 7.5 Watts DC-DC CONVERTER 2:1 W ide Range In p u t FEATURES • •

Contextual Info: SN54HC367, SN74HC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ SCLS309A - JANUARY 1996 - REVISED JULY 1996 High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive up to 15 LSTTL Loads True Outputs SN54HC367

18n8

Contextual Info: T IB P A D 18N8-6C HIGH-PERFORMANCE PROGRAMMABLE AD D RESS DECODER/NAND ARRAY D 3 0 8 6 , DECEMBER 1 9 8 7 Very High Speed Address Decoder Ideal for Use w ith High Speed Processors I/O Propagation Delay: 6 ns Max • Suitable for High Speed N A ND-NAND Logic

D425G

Abstract: ACT21 SN74BCT2166
Contextual Info: SN74BCT2163, SN74BCT2164, SN74BCT2166 16K x 5 CACHE ADDRESS COMPARATORS/TAG RAMs SCHS012-D3513, JUNE 1990-REVISED NOVEMBER 1991 SN74BCT2163, SN74BCT2164 Fast Address to MATCH Delay. 12 ns Max FM PACKAGE CTOP VIEW ’BCT2163 Has Totem-Pole Match Output Q\*~

Contextual Info: -TC74HC259AP/AF/AF N 8-B IT ADDRESSABLE LATCH The TC74HC259A is a high speed C M O S A D D R E S S ­ A B L E L A T C H fabricated w ith silicon gate C 2 M O S technology. It achieves the high speed operation s im ila r to equivalent LSTTL

Contextual Info: S N 74AC T215 7 2K x 16 C A C H E A D D R E S S C O M PA R A TO R /D A TA RAM D3326, JANUARY 1990-REVlSED JUNE 1990 Fast A ddress to Match Delay . . . 20 ns Max FN PACKAGE TOP VIEW Totem -Pole and Open-Drain Match Outputs On-Chip Address/D ata Com parator

74LS74N

Abstract: 6502a M6502 UM6512C 4LS74 UM6502C um6502 M6507
Contextual Info: U IVS C UM 6502 0 7 12 8-bit Microprocessor Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Addressable memory range of up to 64K bytes "R ead y" input Direct memory access capability Bus compatible with MC6800 Choice of external or on-board clocks

SN54HCT240

Abstract: 8S63
Contextual Info: SN54HCT240, SN74HCT240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ SCLS174A - MARCH 1984 - REVISED JANUARY 1996 • Inputs Are TTL-Voltage Compatible • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • SN54HCT240 . . . J OR W PACKAGE

Contextual Info: SMJ684002 512K BY 84HT STATIC RANDOM-ACCESS MEMORY _ * Single 5-V ± 10% Power Supply HJA/HKE PACKAGE TOP ViEW f • • Fast Access Time 20125/35 ns Equal Address and Chip-Enable Access Time • • • All Inputs and Outputs Are TTL-Compatible

Contextual Info: SN74AS7S6, SN74AS757 SN54AS7S6 OCTAL BUFFERS AND UNE DRIVERS WITH OPEN-COLLECTOR OUTPUTS D2661, DECEM BER 1983 - REVISED FEBRUA RY IM S • Open-Collector Outputs Drive But Line* or Buffer Memory Addreu Register • Eliminates the Need for 3-State Overlap

Contextual Info: TM S4500A DYNAMIC RAM CONTROLLER D 2 6 7 4 . JA N U A R Y 1982 TM S 4500A Controls Operation of 8K, 16K, 32K , and 64 K Dynam ic RAMs CLK ROY One Package Contains Address M ultiplexer, Refresh Control, and Timing Control • RENI CS ALE Directly Addresses and Drives Up to 2 5 6 K