A1A17 Search Results

DFSDM

Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static

PX3-2

Abstract: AT32UC3A0256 128f 385P AT32UC3A0512
Contextual Info: Features • High Performance, Low Power 32-Bit Atmel AVR® Microcontroller • • • • • • • • • • • • • • • • – Compact Single-cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

ATMEL 234

Abstract: how to derive sim 900 ARM926EJ-S AT91SAM ISO7816
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer

RF 351

Abstract: multi format memory card reader KPS seven segment display SMC62 AC97 AT32AP7001 AVR32 Pin connection of bk 1085 HS 153 SP "BANDGAP REFERENCE" cross
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

Contextual Info: AT27C4096 Features • • • • • • • • • • Fast Read Access Tim e • 85 ns Low Power CMOS Operation 100 |xA Maximum Standby 30 mA Maximum Active at 5 MHz W ide Selection of JEDEC Standard Packages 40-Lead 600 mil PDIP and Cerdip 44-Pad PLCC and LCC

pcmcia flash card

Abstract: 28F010 28F020 electronic design PCMCIA Flash Memory Card FLG Series
Contextual Info: PCMCIA Flash Memory Card FLG Series White Electronic Designs PCMCIA Flash Memory Card - 256 KILOBYTE through 5 MEGABYTE Intel/Catalyst based GENERAL DESCRIPTION ARCHITECTURE OVERVIEW WEDC’s FLG Series Flash memory cards offer low/medium density linear Flash solid state storage solutions for code

A 434 RF Receiver TRANSMITTER PAIR

Abstract: AT45DB161B pam 8304 bcfk AUTOMATIC ROOM LIGHT CONTROLLER using ldr abstract AT91RM9200 SDRAM XC-01
Contextual Info: Features • Incorporates the ARM920T ARM Thumb® Processor • • • • • • • • • • • • • • • • – 200 MIPS at 180 MHz, Memory Management Unit – 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer – In-circuit Emulator including Debug Communication Channel

82371FB

Abstract: 28F002BC 82437fx 36A4
Contextual Info: E n n n n n n PRELIMINARY 28F002BC 2-MBIT 256K X 8 BOOT BLOCK FLASH MEMORY High Performance Read  80/120 ns Max Access Time 40 ns Max. Output Enable Time Low Power Consumption  20 mA Typical Read Current x8-Only Input/Output Architecture  Space-Constrained 8-bit

MAX714

Contextual Info: IS5F ¡ IB 131,072 x 16/262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation ADVANCE INFORMATION JULY 1997 Industrial Temperature Operation 40°C to +85°C • High-Performance Read

ARM7TDMI System Peripherals

Abstract: program key lock ic 4013 154WA SAM7SE512 at91sam7sexx
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support

ATMEL 910

Abstract: atmel910 SMC911 hsb 772 p interface bluetooth with AVR ptz decoder AC97 AT32AP7000 AVR32 rf mems switch
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

Contextual Info: ISSI IS28F400BV/BLV 262,144 x 16/524,288 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation High-Performance Read Maximum Access Times — 5V: 60/80/120 ns — 3V: 110/150/180 ns

6242E

Abstract: 4583 dual schmitt trigger 6242b la 4508 ic pin diagram R1100D121C AT91Bootstrap CS 5609 ARM926EJ-S ISO7816 5609 dec
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 4 Kbyte Data Cache, 4 Kbyte Instruction Cache, Write Buffer

gps tracker circuit diagram

Abstract: dc-dc PID 13 smr 40000c circuit marking m3 transistor 6249C VID 200-12 S4 DSI LCD TFT FM Stereo Decoder Integrated Circuit BA 758 N7E50-7516VY-20 ptz decoder
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • • • – DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

317 mg

Abstract: 5119A AT91CAP7 30268 AT91CAP7S450A 08K G4 AT91CAP9 2763I AT91CAP7A 3225 12MHZ 20PF
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • • • – 72 MIPS at 80MHz – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support Additional Embedded Memories – One 256 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed

Contextual Info: DENSE-PAC 256Kx8 FLASH/32Kx8 SRAM Combo Memory Mi C R OSYSTE MS DP59CF232 K DESCRIPTION: The DP59CF232K is a combination memory chip consist of 2M-bit Flash Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

28F002BC

Abstract: P28F002BC-T120 82437fx
Contextual Info: E n n n n n n PRELIMINARY 28F002BC 2-MBIT 256K X 8 BOOT BLOCK FLASH MEMORY High Performance Read  80/120 ns Max. Access Time 40 ns Max. Output Enable Time Low Power Consumption  20 mA Typical Read Current x8-Only Input/Output Architecture  Space-Constrained 8-bit

AT91CAP9

Abstract: synchro transmitter 26V 400 HZ AT91CAP7 PA2027 ATMel 046 15X15
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • • – 72 MIPS at 80MHz – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support Additional Embedded Memories – One 256 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed

SMR 40000c

Abstract: gps tracker circuit diagram mrc 439 mrc 501 AC97 ARM926EJ-S AT91SAM9263 ISO7816 ex 3863 RESISTOR 0R 2512
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • • • – DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

PDC 7ROM

Abstract: mcr 5102 1768I atmel part marking AT24C512 7ROM csr schematic usb to spi rj45 Datasheets 7ROM 44256 dram A2 2525 at91rm9200
Contextual Info: Features • Incorporates the ARM920T ARM Thumb® Processor – – – – • • • • • • • • • • • 200 MIPS at 180 MHz, Memory Management Unit 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer In-circuit Emulator including Debug Communication Channel

at29c020 software chip erase application note

Abstract: AT29C020-15DC at29c020 AT29C020-12PC
Contextual Info: AT29C020 Features • • • • • • • • • • • • • Fast Read Access Time -100 ns Five-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram Erase and Program 1024 Sectors bytta/sector) Internal Address and Data Latches for256 Bytes

28F002-T

Abstract: 3A00 28F002T MX28F002 MX28F002-B MX28F002-T
Contextual Info: Introduction Selection Guide MX28F002T/B 2M-BIT[256K x 8] CMOS FLASH MEMORY FEATURES • 262,144 bytes by 8-bit organization • Fast access time: 70/90/120ns • Low power consumption – 50mA maximum active current – 100 µAmaximum standby current • Programming and erasing voltage 12V ± 5%

Power INVERTER schematic circuit

Abstract: transistor ck 112 LDC sensor light dark sensor with op amp and real quanta pe1 AC97 ARM926EJ-S AT91SAM9263 ISO7816 transistor k 3562 AT91SAM9263 MICROCONTROLLER
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • • • – DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer