A19R Search Results

CYD01S36V

Abstract: CYD02S36V CYD04S36V CYD09S36V CYD18S36V 1.0mm pitch BGA
Contextual Info: CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V PRELIMINARY FLEx36TM 3.3V 32K/64K/128K/256K/512 x 36 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that allow simultaneous access of the same memory location The FLEx36 family includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit and

dream france SAM2553

Abstract: SAM2553 ATSAM2553PIADK ATSAM2553PIA-DK ATSAM2553 AT45DB011D-SU 49BV642DT ISP1181BDGG .118 Philips mk5 c4234
Contextual Info: 1. Overview The ATSAM2553PIA-DK is a high quality stand-alone evaluation board based on the ATSAM2553 Integrated Digital Music Instrument dedicated to digital piano and keyboard instruments. Besides the ATSAM2553 the ATSAM2553PIA-DK hardware includes: • 1 Audio CODEC: CIRRUS CS4270(DAC: 103dB DR, -89dB THD+N / ADC: 102dB

BE5L

Abstract: CYD18S18V18 CYD09S36V18 CYD18S36V18 SKR 175 FullFlex36
Contextual Info: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with Single Data Rate SDR operation on each port

FullFlex36

Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port

FullFlex36

Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port

FullFlex36

Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port

FullFlex36

Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR

Contextual Info: HIGH-SPEED 2.5V 1024K x 36 IDT70T3509M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 4.2ns 133MHz (max.)

70T3539M

Contextual Info: HIGH-SPEED 2.5V 1024K x 36 IDT70T3509M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 4.2ns 133MHz (max.)

B17C

Abstract: 4202 bd datasheet BD 139 N A13B A5l102 A18E 48-7191 A17A 48-2210 AND501
Contextual Info: PIN NUMBER 2161-1 102 PIN LENGTH 19.0/.750 PLATING 102 MATING “M” 11.43/.450 PCB “P” 4.37/.172 GOLD “G” N/A TIN “T” OVERALL PACKAGING PK-41661-001 STATUS A-41661-ANA102-* MATERIAL ENGINEERING VOIDS 26-48-1021 26-48-1031 26-48-1041 26-48-1051

Contextual Info: HIGH-SPEED 2.5V 1024K x 36 IDT70T3509M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 4.2ns 133MHz (max.)

FullFlex36

Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR

IDT70T3509M

Abstract: 70T3509MS133 A19R BP256
Contextual Info: HIGH-SPEED 2.5V 1024K x 36 IDT70T3509M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 4.2ns 133MHz (max.)

FullFlex36

Abstract: CYDXXS36V18 400 OHM RESISTOR DQ67
Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR

61a3 mosfet

Abstract: m21 sot23 transistor fairchild aa11 L0DA A10 sot23-5 transistor m21 sot23 h1 sot23-5 honda 20 pin connector pinout ADSP-TS101S f21 diode sot23
Contextual Info: ADSP-TS101S EZ-KIT Lite Evaluation System Manual Revision 1.1, March 2004 Part Number 82-000635-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written

CYD18S18V18

Abstract: FullFlex36 CYD09S36V18 CYD18S36V18 ARRAY VCSEL
Contextual Info: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz

CYD01S36V

Abstract: CYD02S36V CYD04S36V CYD09S36V CYD18S36V
Contextual Info: CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V FLEx36TM 3.3V 32K/64K/128K/256K/512 x 36 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that allow simultaneous access of the same memory location The FLEx36 family includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit and

FullFlex36

Contextual Info: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz

TMS 1070 NL

Abstract: BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780
Contextual Info: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz

36VA

Abstract: CYD01S36V CYD04S36V CYD09S36V CYD18S36V A19R
Contextual Info: CYD01S36V CYD02S36V/36VA/CYD04S36V CYD09S36V/CYD18S36V FLEx36 3.3V 32K/64K/128K/256K/512 x 36 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that enable simultaneous access of the same memory location ■ Synchronous pipelined operation

B17C

Abstract: A5l102 48-7191 5241 kk A17a A18E AND501 A10E A17E PK-41661-001
Contextual Info: PIN NUMBER 2161-1 102 PIN LENGTH 19.0/.750 PLATING 102 MATING “M” 11.43/.450 PCB “P” 4.37/.172 GOLD “G” N/A TIN “T” OVERALL PACKAGING PK-41661-001 STATUS A-41661-ANA102-* MATERIAL ENGINEERING VOIDS 26-48-1021 26-48-1031 26-48-1041 26-48-1051

ZA801D1

Abstract: za801 intech A-2685 Robinson Nugent CATALOG sharp LH2310 L137AA AM-100B mm5330 MEM2009 U5B7740393
Contextual Info: saEdge Index by Function NATIONAL Here is the new Special Function Analog and Digital Circuits data book. It contains detailed information for specifying and applying special amplifiers, buffers, clock drivers, analog switches, and D/A-A/D converter products.

FullFlex36

Abstract: 2BE6
Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port

DQ12-DQ15

Abstract: CYDXXS36V18 16-SD FullFlex36
Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port