A16Q Search Results

ax3217

Abstract: 628512ALFP
Contextual Info: HM628512A Series 4 M SRAM 512-kword x 8-bit HITACHI ADE-203-640B (Z) Rev. 2.0 Nov. 1997 Description The Hitachi HM628512A is a 4-M bit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.5 J i m Hi-CMOS process technology. The

HM628512ALPI-7

Abstract: a12q A17a DP-32 HM628512ALFPI-7 HM628512ALFPI-8 HM628512ALPI-8 HM628512ALTTI-7 Hitachi Scans-001
Contextual Info: HM628512AI Series 524288-word x 8-bit High Speed CMOS Static RAM HITACHI ADE-203-791 Z Preliminary Rev. 0.0 Jun. 20, 1997 D escription T he Hitachi HM 628512A I is a 4-M bit static RAM organized 512-kw ord x 8-bit. It realizes higher density, higher perform ance and low pow er consum ption by em ploying 0 .5 p m H i-C M O S process technology. The

TSOP032-P-0820-B

Abstract: CXK58110OTM
Contextual Info: SONY CX K 58110 OTM/YM •12LB 131072-word x 8-bit High Speed CMOS Static RAM Description CXK58110OTM/YM is a general purpose high speed CMOS static RAM organized as 131,072 words by 8 bits. It is suitable for portable and battery back-up systems by adopting TSOP packages correspond to 2.7 to 5.5V

27C101

Contextual Info: HN27C10 1P/FP Series 131072-word x 8-bit CMOS One Time Electrically Programmable ROM The H N 27C 101P Series are 131072-word x 8-bit one time electrically programmable RO M . In itially, all bits of 1 IN 2 7 C IO ] S eries the H N 27C 101 P/FP series are in the " 1 " state output high .

rca thyristor manual

Abstract: HN623258 101490
Contextual Info: Quick Reference Guide to Hitachi 1C Memories Package Information Reliability of Hitachi 1C Memories Applications MOS Static RAM MOS Pseudo Static RAM Application Specific Memory MOS Dynamic RAM MOS Dynamic RAM Module MOS Mask ROM MOS PROM ECL RAM P> Jc^< j

HM628512BLP-5SL

Abstract: A17a DP-32 HM628512B HM628512BLFP-5 HM628512BLFP-7 HM628512BLP-5 HM628512BLP-7 HM628512BLP-7SL HM628512BLTT7
Contextual Info: HM628512B Series 4 M SRAM 512-kword x 8-bit HITACHI ADE-203-903B (Z) Rev. 1.0 Jan. 13, 1999 Description The Hitachi HM628512B is a 4-Mbit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 (Am Hi-CMOS process technology.

Contextual Info: HM62V8512B Series 4 M SRAM 512-kword x 8-bit HITACHI ADE-203-905 (Z) Preliminary, Rev. 0.0 April 24, 1998 Description The Hitachi HM62V8512B is a 4-Mbit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 (Am Hi-CMOS process technology.

Contextual Info: AKN62321A Series AKN62331A Series 131072-Word x 8-Bit CMOS Mask Programmable ROM PIN CONFIGURATION AKN62321A, AKN62331A Series is a 1-Mbit CMOS maskprogramable ROM organized to 131072-word x 8-bit. It can be operated with a battery because of low power consumption. The

FP-32D package

Abstract: A18Q HM62V8512ALFP-10
Contextual Info: HM62V8512A Series 524288-word x 8-bit High Speed CMOS Static RAM HITACHI ADE-203-642 Z Preliminary Rev. 0.0 Sep. 30, 1996 Description The Hitachi HM62V8512A is a 4-Mbit static RAM organized 512-kword X 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.5 (Am Hi-CMOS process

Contextual Info: SONY | CXK5T81OOOATN/AYN - 1 O L L X /1 2 L L X 131072-word x 8-bit High Speed CMOS Static RAM Preliminary Description The CXK5T81 OOOATN/AYN is a high speed CMOS static RAM organized as 131072-words by 8-bits. Special feature are low power consumption and

A17E

Abstract: 56-PIN LH28F320S3H-L LH28F320S3-L
Contextual Info: SHARP LH28F320S3-L/S3H-L LH28F320S3-L/S3H-L 32 M-bit 4 MB x 8/2 MB x 16 Smart 3 Flash Memories (Fast Programming) DESCRIPTION • High performance read access time The LH 28F320S 3-L/S3H -L flash m em ories with Sm art 3 technology are high-density, low-cost,

A17E

Abstract: 56-PIN
Contextual Info: SHARP LH28F320S5-L/S5H-L LH28F320S5-L/S5H-L 32 M-bit 4 MB x 8/2 MB x 16 Smart 5 Flash Memories (Fast Programming) DESCRIPTION • High performance read access time The LH 28F320S 5-L/S5H -L flash m em ories with Sm art 5 technology are high-density, low-cost,

VDR 14D

Abstract: zd107
Contextual Info: Preliminary CMOS SRAM KM68U1000BLI / Ll-L 128Kx8 Bit Low Voltage & Industrial Temperature Operating SRAM FEATURES GENERAL DESCRIPTION • Industrial Temperature Range : -40 to 85°C > Fast Access Time : 70,100ns max. • Low Power Dissipation Standby(CMOS) : 165(iW (max.)L-Version

A6az

Abstract: A12Q AKN62314BF AKN62314BFZ AKN62314BP AKN62314BPZ AKN62324BF AKN62324BP A16Q a15q
Contextual Info: AKN62314B Series AKN62324B Series 524288-Word x 8-Bit CMOS Mask Programmable ROM PIN CONFIGURATION A K N 62314B , A K N 6 23 24 B Series is a 4-Mbit CMOS mask- programable R O M organized as 524288-w ord x 8-bits. It can be operated with a battery because of low power consumption. The

A16Q2

Contextual Info: sony . C X K 5 8 1 1 0 O T M /Y M 131072-word x 8-bit High Speed CMOS Static RAM D escription C X K 5 8 1 10OTM /YM is a 1M bits, 131072 words by 8 bits, C M O S static RAM . It Is suitable for portable and C XK 58110OTM 32 pin TS O P Plastic C X K 58110OYM

Contextual Info: HM62W8512B Series 4 M SRAM 512-kword x 8-bit HITACHI ADE-203-904 (Z) Preliminary, Rev. 0.0 April 24, 1998 Description The Hitachi HM62W8512B is a 4-Mbit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 (Am Hi-CMOS process

A16Q2

Contextual Info: HM62W8512B Series 4 M SRAM 512-kword x 8-bit HITACHI ADE-203-904B (Z) Rev. 1.0 Dec. 17, 1998 Description The Hitachi HM62W8512B is a 4-Mbit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 ( Am Hi-CMOS process

Contextual Info: HN62321A Series HN62331A Series 131072-Word x 8-Bit CMOS Mask Programmable ROM HN62321A, HN62331A Series is a 1-Mbit CMOS maskprogramable ROM organized to 131072-word x 8-bit. It can be operated with a battery because of low power consumption. The large capacity of 1M bits is optimum for a kanji character generator.