A0A16 Search Results

cd018

Contextual Info: TMS28F033 4194304-BIT SYNCHRONOUS FLASH MEMORY _ SM JS633 - NOVEMBER 1997 PAF 80-PIN PACKAGE TOP VIEW 8 X to. > i> 5 ¡r lo o Ear IS IS IS |w lo I * 0017 C D018 C DQ19 C VDDE C VSSE C OQ20 C 0Q21 C 0Q22 C DQ23 C DQ24 C DQ25 C

UM621024B

Abstract: UM621024 um621024bm-70l
Contextual Info: UM621024B Seríes 128K X 8 CMOS SRAM Features • Single +5V power supply ■ Access times: 55/70 ns max. ■ Current: Low power version: Operating: 70mA Standby: 100(iA Very low power version: Operating: 70mA Standby: 25 (¿A * Full static operation, no clock or refreshing

5C100B-25

Abstract: 5C1008-25 20D14 5C100B
Contextual Info: SMJ5C1008 128K BY 8-BIT STATIC RANDOM-ACCESS MEMORY _ SQMS734A - MAY 1996 - REVISED JUNE 1997 Processed to MIL-PRF-38535 Organization . . . 128K Words x 8 Bits Fast Static Operation Single 5-V Supply ±10% Tolerance Maximum Access Time From Address or

m1 250c fuse

Abstract: at32uc3c em 234 stepper dtx 370 DTH block diagram lta 301 VT 546 Modem basic circuit diagram EIC 4021 shift registers 4050
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

Contextual Info: Very Low Power CMOS SRAM 128K X 16 bit BS616LV2016 Pb-Free and Green package materials are compliant to RoHS n FEATURES n DESCRIPTION Ÿ Wide VCC operation voltage : 2.4V ~ 5.5V Ÿ Very low power consumption : VCC = 3.0V Operation current : 30mA Max. at 55ns

AS6C1008

Abstract: AS6C1008-55
Contextual Info: February 2007 AS6C1008 128K X 8 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION Access time :55ns Low powe r consumption: Operating current:10 mA TYP. Standby current: 1 µA (TYP.) Single 2.7V ~ 5.5V po we r supply Fully Compatible with all Competitors 5V product

GCM 38112

Abstract: Wifi to I2C ST ATUC3A4256S AT32UC3A3 dsp ssb modulation demodulation barcode reader using avr AT32UC3A64 ATUC3A3256 DesignWare Hi-Speed USB On-The-Go Controller AT32UC3A3256S
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

tdb 0117

Abstract: 32-PIN
Contextual Info: SPACE ELECTRONICS INC. 128K X 8-BIT EEPROM SPACE PRODUCTS 28LV010RP VCC 1 RDY/BUSY 32 A15 A14 RES RES A12 WE OE A7 A13 A6 A8 CE A5 A9 WE A11 RES A3 SEi 28LV010RP A2 OE High Voltage Generator VSS A16 A4 16 VCC CE A0 I/O7 I/O0 I/O6 I/O1 I/O5 I/O2 I/O4 VSS I/O3

A63L73321

Contextual Info: A63L73321 Series 128K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Flow-through Data Output Preliminary Document Title 128K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Flow-through Data Output Revision History Rev. No. History

A67L7332

Abstract: A67L7336 A67L8316 A67L8318
Contextual Info: A67L8316/A67L8318/ A67L7332/A67L7336 Series 256K X 16/18, 128K X 32/36 Preliminary LVTTL, Pipelined DBA SRAM Document Title 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue

NS41024S55

Abstract: NS41024S55E-SMD PDM41024W
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 11/28/95 Last Update Date: 12/20/96 Last Major Revision Date: 11/28/95 MDNS41024S55-X REV 0B0 1 Megabit Static RAM 128K x 8 bit General Description NS41024S55 is a high performance, standard power version CMOS static RAM organized as

NS41024S25

Abstract: NS41024S25E-SMD PDM41024W 5962-8959837MMA
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 11/28/95 Last Update Date: 12/20/96 Last Major Revision Date: 11/28/95 MDNS41024S25-X REV 0B0 1 Megabit Static RAM 128K x 8 bit General Description NS41024S25 is a high performance, standard power version CMOS static RAM organized as

NS41024S45

Abstract: NS41024S45E-SMD PDM41024W
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 11/28/95 Last Update Date: 12/20/96 Last Major Revision Date: 11/28/95 MDNS41024S45-X REV 0B0 1 Megabit Static RAM 128K x 8 bit General Description NS41024S45 is a high performance, standard power version CMOS static RAM organized as

TC518129AFwl

Contextual Info: TOSHIBA TC518129APL/AFL/AFWL-80LV/lOLV/12LV TC518129AFTL80LV/lOLV/12LV SILICON GATE CM O S 131,072 W ORD x 8 BIT C M O S PSEUDO STATIC RAM D escription The TC5181 29A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV

TMP96C141F

Abstract: tmp96c141
Contextual Info: TOSHIBA UNDER DEVELOPMENT TMP90PM38 4.15 Program Operation Timing Chart PROM mode High Speed Program Formula * A0-A16 CE OE D0~D 7 UU U/ m ' y \ \ \ i\ _;_;_ m y UNENOWN ~ - \ _ ( / \ ~\ tNPUTDATA CONFIRMATION m m / S _ / OUTPUT DATA \

tsop32 8x20

Abstract: M68AF127B PDIP32 SO32 TSOP32 M68AF127
Contextual Info: M68AF127B 1Mbit 128K x8 , 5V Asynchronous SRAM FEATURES SUMMARY • SUPPLY VOLTAGE: 4.5 to 5.5V ■ 128K x 8 bits SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns ■ LOW STANDBY CURRENT ■ ■ LOW VCC DATA RETENTION: 2V TRI-STATE COMMON I/O

TAA 310A

Abstract: KM681000BLP-7L 128k x8 SRAM TSOP km681000blp-7 KM681000B KM681000BL KM681000BLE KM681000BL-L
Contextual Info: KM681000B Family CMOS SRAM 128Kx8 bit High Speed CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.6 um CMOS • Organization : 128K x 8 • Power Supply Voltage : Single 5V +/-10% • Low Data Retention Voltage : 2V Min • Three state output and TTL Compatible

KM68U1000B

Abstract: KM68V1000B
Contextual Info: CMOS SRAM KM68V1000B, KM68U1000B Family 128Kx8 bit Low Power & Low Vcc CMOS Static RAM GENERAL DESCRIPTION FEATURE SUMMARY • Process Technology: 0.6 um CMOS • Organization : 128Kx8 • Power Supply Voltage KM68V1000B fa m ily : 3.3V +/- 0.3V KM68U1000B family : 3.0V +/- 0.3V

44-PIN

Abstract: M48T129V M48T129Y
Contextual Info: M48T129Y M48T129V 5.0 or 3.3V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT, BATTERY, and CRYSTAL ■ YEAR 2000 COMPLIANT ■ BCD CODED CENTURY, YEAR, MONTH, DAY, DATE, HOURS, MINUTES, and

DFSDM

Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static

Contextual Info: PRE LIM INARY Advanced Micro Devices Am27LV010/Am27LV01 OB 1 Megabit 131,072 x 8-Bit CMOS EPROM DISTINCTIVE CHARACTERISTICS • Single +3.3 V power supply — Regulated power supply 3.0 V-3.6 V — Unregulated power supply 2.7 V-3.6 V (for battery operated systems)

Contextual Info: PRELIMINARY AMDH Am29LV001 B 1 Megabit 128 K x 8-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS • Single power supply operation ■ Unlock Bypass Mode Program Command — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications

AM29F01OA-45

Contextual Info: AMDZ1 Am29F010A 1 Megabit 128 K x 8-bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory DISTINCTIVE CHARACTERISTICS • Single power supply operation ■ — 5.0 V ± 10% for read, erase, and program operations Embedded Algorithms — Embedded Erase algorithm automatically

Contextual Info: ' Pt: LiP,MI i AR AMD* Am29F200A 2 Megabit 256 K x 8-Bit/128 K x 16-Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS • 5.0 V ± 10% for read and write operations — Minimizes system level power requirements ■ High performance