decoder
Abstract: PQFP100 PQFP144 PQFP160 STI3500A mpeg video decoder
Contextual Info: CONSUMER DIGITAL COMPRESSION Type STi3400 STi3430 STi3500A STi3520 STi3520A STi3520M STi4500 STi4510 Description MPEG-1/H.261 Video Decoder MPEG-1 Single-Chip Audio/Video/CD-ROM Decoder MPEG Video Decoder MPEG Audio/MPEG-2 Video Integrated Decoder MPEG Audio/MPEG-2 Video Decoder with Memory Optimization
|
Original
|
sti3400sti3430sti3500asti3520+11sti3520asti3520msti4500sti4510pqfp120decoderpqfp100pqfp144pqfp160mpegvideo decoder
|
PDF
|
A2 diode
Abstract: diode a3 STI4500
Contextual Info: 0ns 250ns 500ns TITLE PLX SGS PCI MPEG, STI4500 REGISTER READ [AUDRD.TD] 08/10/95 CLK25 [3,14] LA[1.31], BHE,BLE [3,14] 500 502 504 506 [6,18] [6,18] ADS~ [3,18] [3,18] LW/R [5,15] [5,15] AUDRW [5,16] [5,16] BLAST~ [4,10] AUDIO STATE AIDLE A0 A1 A2 A0 A4
|
Original
|
250ns500nssti4500clk25+2a2 diodediode a3
|
PDF
|
sti3520acv
Abstract: IDCT CCIR601 DD40 DD41 DD44 DD45 DD46 PQFP160 STI-350
Contextual Info: S G S -T H O M S O N " > !§ . B û D g œ [ L E Ê ir M D ( g § S T Í3 5 2 0 A MPEG AUDIO / MPEG-2 VIDEO INTEGRATED DECODER SUMMARY DATA • SINGLE CHIP IMPLEMENTING THE MPEG DECODING FUNCTIONS OF THE STi3500A VIDEO DECODER AND THE STi4500 AUDIO DECODER
|
OCR Scan
|
ccir601q0731ssti3520acvidct+7dd40dd41dd44dd45dd46pqfp160sti-350
|
PDF
|
PQFP144
Abstract: decoder PQFP160 IMSA110 PGA100 PQFP100 mpeg PQFP-144 video decoder STI3500
Contextual Info: PROCESSORS & PERIPHERALS DIGITAL COMPRESSION Type IMSA110 STi3220 STi3520 STi3520A STi3430 STi3400 STi3500A STi3520M STi4500 STi4510 Description Image and Signal Processor Motion Estimation Processor MPEG Audio/MPEG-2 Video Integrated Decoder MPEG Audio/MPEG-2 Video Decoder with Memory Optimization
|
Original
|
imsa110sti3220sti3520sti3520a+15sti3430sti3400sti3500asti3520msti4500sti4510pqfp144decoderpqfp160pga100pqfp100mpegpqfp-144video decodersti3500
|
PDF
|
LS 4704
Abstract: free 4510 c4388 TI4510 pin diagram cmos 4510 PQFP100 xI32
Contextual Info: STi4500 STi4510 MPEG AUDIO DECODER . . . . . . . . . . . . ADVANCE DATA SINGLE-CHIP ISO/IEC 11172-3 LAYER I & II DECODER DECODES IN SINGLE CHANNEL, DUAL CHANNEL, STEREO OR JOINT STEREO MODES SUPPORTS ALL MPEG BIT RATES AT 32, 44.1 & 48kHz, AND FREE FORMAT AT 32 &
|
Original
|
sti4500sti451048khz18-bit+8pqfp120ls 4704free 4510c4388ti4510pin diagram cmos 4510pqfp100xi32
|
PDF
|
STI3500A
Abstract: video decoder concealment picture in picture chip PQFP160 1996 video display processor cmos video chip quad video processor
Contextual Info: STi3520 MPEG AUDIO / MPEG-2 VIDEO INTEGRATED DECODER . . . . . . . . . . . BRIEF DATA SINGLE CHIP COMBINING THE DECODING FUNCTIONS OF THE STi3500A VIDEO DECODER AND THE STi4500 AUDIO DECODER ON-CHIP PLL ALLOWING FULL CHIP OPERATION WITH TWO EXTERNAL CLOCKS
|
Original
|
sti3520sti3500asti450048khz+8pqfp160sti3520cvvideo decoderconcealmentpicture in picture chip1996 video display processorcmos video chipquad video processor
|
PDF
|
STI3400
Abstract: STI4500
Contextual Info: 0ns 250ns 500ns TITLE PLX SGS PCI MPEG, STI4500 REGISTER READ [AUDRD.TD] 08/10/95 CLK25 [3,14] LA[1.31], BHE,BLE [3,14] 500 502 504 506 [6,18] [6,18] ADS~ [3,18] [3,18] LW/R [5,15] [5,15] AUDRW [5,16] [5,16] BLAST~ [4,10] AUDIO STATE AIDLE A0 A1 A2 A0 A4
|
Original
|
250ns500nssti4500clk25+5100ns200ns300ns150nssti3400
|
PDF
|
STI4500
Contextual Info: 0ns 100ns 200ns 300ns TITLE PLX SGS PCI MPEG, STI4500 REGISTER WRITE [AUDWR.TD] 08/10/95 CLK25 [3,14] [3,14] LA[1.31], BHE,BLE [3,16] [3,16] [6,18] [6,18] LD[0.15] [6,18] ADS~ [3,18] [3,18] LW/R [5,15] [5,15] AUDRW [5,16] [5,16] BLAST~ [4,10] AUDIO STATE
|
Original
|
100ns200ns300nssti4500+1clk25
|
PDF
|
dc-dc converter with sg3525
Abstract: LM317 SMD smps 1500W lm317 decoder lm337 so-8 lm317 5v to 3.3v DC-dc converter sg3525 sg3525 LM337 TO-3 BZW04
Contextual Info: PROFESSIONAL/PERSONAL COMPUTERS RECOMMENDED PRODUCTS FROM SGS-THOMSON POWER SUPPLY Cont’d POWER SUPPLY Type L78xx L79xx L78Mxx LM317 LM317MDT LM323 LM337 LM338K LM350K L78Sxx L78Lxx LM723 L4940Vxx L4941 LFxx LExxA/C LK115Dxx LD1117xx L4931 Description
|
Original
|
l78xxl79xxl78mxxlm317+16lm317mdtlm323lm337lm338klm350kl78sxxdc-dc converter with sg3525lm317 smdsmps 1500wlm317 decoderlm337 so-8lm317 5v to 3.3vdc-dc converter sg3525sg3525lm337 to-3bzw04
|
PDF
|
DRAM 256kx4
Abstract: tda1311t U0603 c0607 AMA6 U0604 AMD31 PD0601 PD0602 J0601
Contextual Info: 1 2 3 4 5 6 7 8 VCC 2 LA1 LA[2.10] LA[2.10] 87 86 85 83 81 80 78 77 LA2 LA3 LA4 LA5 LA6 LA7 103 107 108 109 111 112 114 94 95 116 3 AUDCS~ 3 AUDRW 2 RESET~ 117 118 PU0602 PD0601 SCLK LRCLK PCMDATA OSCEN CLKOUT WAIT IRQ IRQOD OSCOUT B 1 8 100 101 102 BCK
|
Original
|
pu0602pd0601r0604tda1311t+12r0603c0601u0604u0603r0602tda1308tdram 256kx4c0607ama6amd31pd0602j0601
|
PDF
|
Y0803
Abstract: U0801B IC LM7805 N1 Y10 pin diagram of IC LM7805 C0801 STI3400 U0101 U0604 plx9060
Contextual Info: Q CL 7 D PR 3 4 14 2 U?A Q 5 CLK 6 {Value} 1 1 2 3 4 5 6 SPARE GATES: 8 ECN HISTORY DESCRIPTION REV 2 -ADD CDREQ DATE APPROVAL 10/24/95 U0101 PU0101 A PU0102 PU0103 12 11 D U0801B 9 Q CLK 8 Q 74ACT74 13 20V8C DIP 22 21 20 19 18 17 16 15 CL O1 IO2 IO3 IO4 IO5
|
Original
|
u0101pu0101pu0102pu0103+12u0801b74act7420v8cpu0104y0803ic lm7805n1 y10pin diagram of ic lm7805c0801sti3400u0604plx9060
|
PDF
|
L1239
Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _
|
Original
|
9060/mpegl1239l0728l0312+7sgs l282l0936l11616l99600x00000404l1198l1322
|
PDF
|
0x00000564
Abstract: 0x00000404 0x00000532 0x0000047C 0x000005BE STI3400 0x0000040A sgs 8 r 15 93CS46 0x0000045C
Contextual Info: PLX Technology SGS PCI MPEG Board I/O MAP 07/15/96 PCI Configuration Registers PCI CFG Offset 0x00000000 0x00000002 BIT 0-15 0-15 Function Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) Device ID, Allocated by PLX (Read-only) (Default = 9060)
|
Original
|
0x000000000x000000020x0000000416-bit+1193cs46pci90600x000005640x000004040x000005320x0000047c0x000005besti34000x0000040asgs 8 r 150x0000045c
|
PDF
|
Y0803
Abstract: R0801 U0801A Y0802 PU0806 C0801 STI3400 R0806 U0802 R0803
Contextual Info: 1 2 1 7 Y0801 NC VCC GND OUT 3 14 4 5 6 7 8 VCC 8 1 CLK50R 50 MHz R0801 2 CLK50 FOR STI3400 33 A 4 A CLK25R~ 1 PU0801 4 3 D PR 2 CLK25A FOR PCI9060, FIFO 33 U0801A Q R0802 2 5 CLK25R 1 R0803 2 CLK25B FOR MACHS 33 CLK CL Q 2,4,9 3 6 74ACT74 1 PU0802 1 7 B VCC
|
Original
|
y0801clk50rr0801clk50+13sti3400clk25rpu0801clk25apci9060u0801ay0803y0802pu0806c0801r0806u0802r0803
|
PDF
|
|
|
TCL COLOUR TV SCHEMATIC DIAGRAM
Abstract: xnxx BMS150 st1450 STI3500 STI3500 preliminary STI3520 4511 gm 71S1237 DD41
Contextual Info: "* J i, r Z 7 S G S - T H O M S O N M MSi sMM0(3i> STÌ3520 MPEG AUDIO / MPEG-2 VIDEO INTEGRATED DECODER PRELIMINARY DATA The STi3520 requires minimal support from an external microcontroller, which is mainly required to initialise the video decoder at the start of every
|
OCR Scan
|
q073143tcl colour tv schematic diagramxnxxbms150+7st1450sti3500sti3500 preliminarysti35204511 gm71s1237dd41
|
PDF
|
L0936
Abstract: l0728 L1239 L0988 L9960 l0312 l0832 L4204 l0416 L9804
Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration
|
Original
|
mach220a0xe60b0x350bsti3400+16sti4500pci906016-bit0x2043v0166v0167l0936l0728l1239l0988l9960l0312l0832l4204l0416l9804
|
PDF
|
STI3400
Abstract: STI4500
Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration
|
Original
|
mach220a0xe60b0x350bsti3400+4sti4500pci906016-bit0x2043
|
PDF
|
la2 d2 timer
Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL
|
Original
|
pci906016-bitsla2 d2 timerl0936+8header 13x2l0728pin diagram of ic lm7805u0202l9960sti3400l1239l4204
|
PDF
|
L0936
Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
Contextual Info: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_
|
Original
|
9060/mpegl0936l0988l9960+7l1239sti3400l1462e442l1105l3216u0601
|
PDF
|
STC21
Abstract: microcontroller STC
Contextual Info: 7 SGS-THOMSON *7M, « re iu ra M D ig s STÌ4500 STi45iO MPEG AUDIO DECODER AD VANC E DATA • SINGLE-CHIP ISO/I EC 11172-3 LAYER I & II DECODER ■ DECODES IN SINGLE CHANNEL, DUAL CHANNEL, STEREO OR JOINT STEREO MODES ■ SUPPORTS ALL MPEG BIT RATES AT 32,
|
OCR Scan
|
sti45io48khz18-bitpmpqf120+2stc21microcontroller stc
|
PDF
|