ST16C554D Search Results

Contextual Info: XR16C854 Preliminary Information QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO DESCRIPTION The XR16C854 *1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654. The 854 is an enhanced UART with 128 byte

st16c554

Contextual Info: STARTECH ST16C554D An J F EXflRCompany Printed February 20,1997 QUAD ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C554 is a universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. A programmable baud rate generator is

Contextual Info: DATA SHEET Communications Quad Channel AP NOTE DAN-108 AP NOTE DAN-102 AP NOTE GEN UART XR16C854D Quad UART with RX/TX FIFO Counters and 128-Byte FIFO The XR16C854 * 1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654.

Contextual Info: Preliminary Information V fE X A R XR16C854 QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO H F DESCRIPTION The XR16C854 *1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654. The 854 is an enhanced UART with 128 byte

st16c554cj68

Abstract: ST16C554DCJ st16c554
Contextual Info: ST16C554 ST16C554D STARTECH Printed September 7, 1994 QUAD ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C554 is a universal asynchronous receiver and transm itter with 16 byte transmit and receive FIFO. A programmable baud rate generator is

16C554

Abstract: ST16C554 TL16C554 XR16C854 XR16C854CV
Contextual Info: XR16C854 Preliminary Information QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO DESCRIPTION The XR16C854 *1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654. The 854 is an enhanced UART with 128 byte

Contextual Info: DATA SHEET Communications Quad Channel AP NOTE DAN-108 AP NOTE DAN-107 AP NOTE GEN UART AP NOTE AN554 ST16C554D Quad UART with 16-Byte FIFOs The ST16C554D is a universal asynchronous receiver and transmitter UART with a dual foot print interface. The 554D is an enhanced UART with 16 byte FIFOs, receive trigger

16C554DCQ

Abstract: st16c554
Contextual Info: STARTECH ST16C554D A n2£»E X 4R C om pany Printed August 3, 1995 QUAD ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C554 is a universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. A programmable baud rate generator is

ST16C554

Contextual Info: DATA SHEET Communications XR16C854 AP NOTE DAN-108 AP NOTE DAN-102 AP NOTE GEN UART Quad UART with RX/TX FIFO Counters and 128-Byte FIFO The XR16C854 * 1 854 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554D/654 and ST68C554/654.

TL16C554N

Abstract: XR16C854CVF XR16C854IV DAN108
Contextual Info: XR16C854 -Quad UART with RX/TX FIFO Counters and 128-Byte FIFO HomeNewsCareers Investor Relations Contact Us PartnerNet Login Search CommunicationsInterfacePower Management XR16C854 Support Info Request How to Order Samples Print this page Quad UART with RX/TX FIFO Counters and 128-Byte FIFO

Contextual Info: STARTECH An Preliminary Information ST16C654 Company Printed August 9, 1996 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTES OF FIFO AND INFRARED ENCODER/DECODER DESCRIPTION CDA* RIA* RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD RID* CDD*

MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Contextual Info: R E A L W O R L D S I G N A L P TM R O C E S S I N G Interface Selection Guide 2Q 2004 Table of Contents Introduction .3 Data Line Circuits High-Speed Interconnect LVDS, xECL, CML .4

ST16C654

Abstract: 16c654
Contextual Info: \ Preliminary \ / Information J STARTECH ST16C654 Printed August 3,1995 An X * EX4R Company QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTES OF FIFO AND INFRARED ENCODER/DECODER DESCRIPTION PLCC Package The ST16C654 is a Quad universal asynchronous

16C2550

Abstract: LQPF64 scc2698bc1a84 SCC2691AC1A28 SCN68681AC1N40 LQFP48 TL16C550BN LQFP-48 SC28C94A1N motorola 68000 mode of operation
Contextual Info: Philips Data Communication Industrial UART Product Line Chart Part Technology Buffer FIFO Rx/Tx Speed (max@16x) Interrupt Vcc Key Features Package Part number Temp Range 0 to 70 C˚ Part number Temp Range -40 to 85 C˚ 1 SCC2691 (CMOS) 4/2 125 kbps Normal

EXAR XR2209

Abstract: XR16C2850 XR68C681 XR88C192 ST16C650A
Contextual Info: ABOUT EXAR I PRODUCTS I INDEX I SALES INFO I INFORMATION REQUEST I SEARCH I HELP I Exar Products Alphanumeric Index To access product information and data sheets, click on the part number below. ST16C1450 ST16C1451 ST16C1550 ST16C1551 ST16C2450 ST16C2550 ST16C2552

XR16C2850

Abstract: XR68C681 XR88C192 ST16C650A
Contextual Info: I ABOUT EXAR I PRODUCTS I INDEX I SALES INFORMATION I INFORMATION REQUEST I SEARCH I HELP I Serial Communications UARTs Product Selector Guide UART Products 32-bit Data Bus PCI UART Family Device Channels Osc./Ext CLK Data TX/RX Rate FIFO @ 5V Bytes (Mbps)

Contextual Info: DATA SHEET Communications Quad Channel AP NOTE AN554 AP NOTE DAN-107 AP NOTE DAN-108 AP NOTE GEN UART ST16C554 Quad UART with 16-Byte FIFOs Features • Compatibility with the Industry Standard ST16C454, ST68C454, ST68C554, TL16C554 • 1.5 Mbps transmit/receive operation 24MHz

16C554D

Abstract: icl 7017 DSRC icl 7017 datasheet icl 7017 power supply 16C554 Code T6S package Code T6S 16-BYTE 68C554
Contextual Info: ST16C554/554D QUAD UART WITH 16-BYTE FIFO’S August 2005 DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 PLCC Package -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57

68C554

Abstract: ST16C554CQ64 16-BYTE 16C554 ST16C454 ST16C554D ST16C554DCJ68 ST16C554DCQ64 ST68C554 16c554d
Contextual Info: ST16C554/554D ST68C554 QUAD UART WITH 16-BYTE FIFO’S DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA 14 56 -RTSD INTA

ST16C5501

Abstract: ST16C554 ST16C554D 1.8432 ST68C554 ST16C454 ST16C654 ST16C654CJ68 ST16C654CQ64 ST16C654DCQ64
Contextual Info: ST16C654 STARTECH An Company Printed December 12, 1996 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTES OF FIFO AND INFRARED ENCODER/DECODER DESCRIPTION CDA* RIA* RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD RID* CDD* 8 7 6 5 4 3 2 1 68 67

FSQ510 Equivalent

Abstract: BTA12 6008 bta16 6008 ZIGBEE interface with AVR ATmega16 Precision triac control thermostat thyristor t 558 f eupec gw 5819 diode transistor a564 A564 transistor BSM25GP120 b2
Contextual Info: SEMICONDUCTORS MCU/MPU/DSP Atmel. . . . . . . . . 167, 168, 169, 170, 171, 172 Blackhawk. . . . . . . . . . . . . . . . . . . . . . . . . 173 Cyan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Cypress. . . . . . . . . . . . . . . 175, 176, 177, 178

Arduino Mega2560

Abstract: 13001 S 6D TRANSISTOR arduino uno rev 3 agilent optical encoder 9988 MZ 13001 TRANSISTOR arduino mega 2650 skiip 613 gb 123 ct arduino sound sensor module pic arduino nano mc34063l
Contextual Info: ND3% BASE1 XXXX2108-0010-1-P 10 TSQ: 3001 CMS: CMS-USM TS host OP: NN COMP: 15-07-11 Hour: 13:07 TS:TS date TS time MCUS, MPUS, DSPS & DEVELOPMENT TOOLS Find Datasheets Online 8-BIT MCUS & DEVELOPMENT TOOLS 1 PSoC 3 DEVELOPMENT KITS ARDUINO MCU DEVLOPMENT PLATFORM

HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Contextual Info: TM Technology for Innovators Interface Selection Guide 4Q 2006 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Marvell MV64360

Abstract: MVME6100 MVME761P26E-011 MVME761P26E-001 MVME61006E-0163 MVME5500 SCANBE ejector MVME61006E-0173 Tundra TSi148 tsi148
Contextual Info: MVME6100 Series VMEbus Single-Board Computer The MVME6100 is the first VMEbus SBC designed with the Tundra Tsi148 VMEbus interface chip nn 2eSST VMEbus protocol with 320MB/s transfer rate across the VMEbus nn MPC7457 PowerPC processor running at up to 1.267 GHz