RM5261A Search Results

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 2, September 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

Contextual Info: :4 2: 11 AM RM5261A Microprocessor with 64-Bit System Bus Data Sheet Released Th ur sd ay ,0 4N ov em be r, 20 04 02 RM5261A Data Sheet Proprietary and Confidential Released Issue 4, February 2004 Do wn l oa de d by C on te n tT ea m of Pa r tm in er In

GT-64240

Abstract: gt64240 ieee 32 bit floating point multiplier IT8172 RM5261A RM5231A RM7035C RM7065C EV-64120A it8172g
Contextual Info: RM5231A/RM5261A Microprocessors Released 64-Bit MIPS RISC Microprocessors with 32/64-bit System Bus FEATURES Virtually indexed, physically tagged. Write-back and write-through on per-page basis. • Pipeline restart on first double word for data cache misses.

Contextual Info: :4 6: 22 AM RM5261A Microprocessor with 64-Bit System Bus Data Sheet Released Tu es da y, 14 Se pt em be r, 20 04 06 RM5261A Data Sheet Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n RM5261A™ Microprocessor with 64-Bit System Bus Proprietary and Confidential

R4000

Abstract: RM5200 RM5261A
Contextual Info: :17 :12 AM RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary on Th ur sd ay ,0 8A ug us t, 2 00 2 06 RM5261A Data Sheet Do wn loa de db yt am er na bil of Si lic on Ex pe rt RM5261A™ Microprocessor with 64-Bit System Bus Proprietary and Confidential

R4000

Abstract: RM5200 RM5261A
Contextual Info: :5 3: 26 AM RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary on Tu es da y, 28 Oc to be r, 20 03 02 RM5261A Data Sheet Do wn lo ad ed by m oh am ed fa ro uk o fs ilic on ex pe rt RM5261A™ Microprocessor with 64-Bit System Bus Proprietary and Confidential

Contextual Info: :0 6: 52 PM RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary co n Th ur sd ay ,1 5M ay ,2 00 3 02 RM5261A Data Sheet Proprietary and Confidential Preliminary Issue 3, February 2002 Do wn l oa d ed by Co nt e nt Te a m of Pa rtm in er

Contextual Info: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

ACT7000ASC

Contextual Info: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●

RM7900

Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor October 01, 2010 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:

Contextual Info: Standard Products MIP7365 64-Bit Superscaler Microprocessor January 11, 2007 FEATURES ❑ Upscreened PMC-Sierra RM7065C ❑ Military and Industrial Grades Available ❑ Dual issue symmetric superscalar microprocessor with instruction prefetch optimized for system level

GT-6424

Contextual Info: RM7935/RM7965 Microprocessors Released RM7935/RM7965 64-bit Microprocessors with Integrated L2 Cache and EJTAG FEATURES High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract, and 3 Operand Multiply.

RM7965

Abstract: RM79xx Family User Manual RM7900 RM7065C MIPS64 RM5261A RM7065A MIP7965 MIPS RM7965
Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor Preliminary November 16, 2005 FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:

MIP7365

Contextual Info: Standard Products MIP7365 64-Bit Superscaler Microprocessor February 17, 2012 FEATURES ❑ Upscreened PMC-Sierra RM7065C ❑ Military and Industrial Grades Available ❑ Dual issue symmetric superscalar microprocessor with instruction prefetch optimized for system level

rm7035c

Abstract: MIPS RM7965 CM5470
Contextual Info: CM5470 Preliminary GEN-M7K-56-000 Data Sheet PM A MEMBER OF PMC-SIERRA’S CLOCK FAMILY 1: 59 System Clock Generator For MIPS-Based Designs 00 5 10 :1 PMC-Sierra’s GEN-M7K-56-000 is perfectly tailored to perform the clock generation required in a design using MIPS-basedTM processors. The GEN-M7K-56-000 covers the clocking needs of the 5K and

7000ASC

Abstract: Tag 225 600 replacement 700M RM5261A RM7000A RM5200 R5000 mips
Contextual Info: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor October 9, 2009 www.aeroflex.com/Avionics FEATURES • ■ ● 225, 300, 350 MHz operating frequency Consult Factory for latest speeds MIPS IV Superset Instruction Set Architecture ● ● ●

telcordia GR-63-CORE

Abstract: RM79xx Family User Manual RM7965 RM79xx PCB footprint cqfp 132 RM7065C RM7900 PMC-2030581 PCB footprint cqfp 208 MIPS7965-668B1
Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor March 23, 2007 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:

RM7035C

Contextual Info: CM5470 Preliminary GEN-M7K-56-000 Data Sheet AM A MEMBER OF PMC-SIERRA’S CLOCK FAMILY 2: 24 System Clock Generator For MIPS-Based Designs 04 09 :1 PMC-Sierra’s GEN-M7K-56-000 is perfectly tailored to perform the clock generation required in a design using MIPS-basedTM processors. The GEN-M7K-56-000 covers the clocking needs of the 5K and

rm7065c

Contextual Info: CM5470 Preliminary GEN-M7K-56-000 Data Sheet AM A MEMBER OF PMC-SIERRA’S CLOCK FAMILY 0: 50 System Clock Generator For MIPS-Based Designs 5 02 :2 PMC-Sierra’s GEN-M7K-56-000 is perfectly tailored to perform the clock generation required in a design using MIPS-basedTM processors. The GEN-M7K-56-000 covers the clocking needs of the 5K and

RM7065C

Abstract: RM7035C exposed tektronix 466 RM5231A RM5261A RM7065 RM7065A gt-64240 GT64240
Contextual Info: RM7035C/RM7065C Microprocessors Preliminary 64-Bit MIPS RISC Microprocessors with Integrated L2 Cache FEATURES 16 Kbytes instruction, 16 Kbytes data, 256 Kbytes on-chip secondary. • Per line cache locking in primaries and secondary. • Fast Packet Cache increases

rm7965

Abstract: RM79xx Family User Manual telcordia GR-63-CORE MIPS RM7965 RM7900 RM79xx
Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor June 18, 2007 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:

RM7965

Abstract: RM7900 MIPS64 RM5261A RM7065A RM7065C 256-TBGA SCD79 RM79xx RM79xx manual
Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor October 9, 2009 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:

MIP7965

Abstract: MIP7965-750B1R cpu aeroflex mip 291 MIP7965-750B1 CQFP 208 datasheet MIPS64 RM5261A RM7065A RM7065C
Contextual Info: Standard Products MIP 7965 64-Bit Superscaler Microprocessor October 01, 2010 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features: