IDT71V633 Search Results

IDT71V633

Contextual Info: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz

IDT71V633

Contextual Info: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ tecture provides cost-effective 2-1-1-1 performance for processors up to 50 MHz. The IDT71V633 SRAM contains write, data-input, address and control

Contextual Info: 64K X 32, 3.3V SYNCHRONOUS SRAM WITH FLOW-THROUGH OUTPUTS PRELIMINARY IDT71V633 Integrated Device Technology, Inc. FEATURES: • • • • • • • 64K x 32 m em ory configuration Supports high perform ance system speed - up to 50 MHz 11 ns C lock-to-D ata Access

Contextual Info: PRELIMINARY 64K x 32 , 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT In te g ra te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • • • • • • • 64K x 32 m em ory configuration Supports high perform ance system speed - up to 50 MHz

Contextual Info: PRELIMINARY 64K x 32 , 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT In te g ra te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • • • • • • • 64K x 32 m em ory configuration Supports high perform ance system speed - up to 50 MHz

IDT71V633

Contextual Info: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz

Contextual Info: Integrated Device Technology, Inc. PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access

IDT71V633

Contextual Info: PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access

IDT71V633

Abstract: A3780
Contextual Info: PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access

pin diagram for core i3 processor

Contextual Info: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz

Contextual Info: PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT Integrated D evice Technology, Inc. FEATURES: • • • • • • • • 64K x 32 m em ory configuration Supports high perform ance system speed - up to 50 MHz

ADSP-21160 reference manual

Abstract: ADSP-21160 EC Bus
Contextual Info:  ;7(51$/0(025< Figure 8-0. Listing 8-0. Table 8-0. 2YHUYLHZ ([WHUQDO0HPRU\,QWHUIDFH The ADSP-21160 external memory interface has several enhancements over that of the ADSP-2106x. These changes were introduced to improve bus throughput when interfacing to synchronous memories and

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for DSLAM designs utilizing SWITCHStAR where full header access is needed. Supports VPI Tunneling

6AD5

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network side of SWITCHStAR DSLAM designs where full header access is needed. Supports VPI Tunneling

ADM809RAR

Abstract: AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857
Contextual Info: DISCLAIMER Alliance Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Alliance Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied

DSLAM

Abstract: 77V012 77V400 77V500 IDT71V633 IDT77155 IDT77V012 IDT77V400 IDT77V500
Contextual Info: CENTRAL OFFICE DSLAM Design using SWITCHStARTM APPLICATION BRIEF AB-221 Introduction SWITCHStAR Advantages The IDT SWITCHStAR family of products is well suited for Central Office CO Digital Subscriber Line Access Multiplexers (DSLAM) designs where high quality, high performance ATM switching at a low price is key.

Contextual Info: PRELIMINARY 64K x 32, 3.3V S Y N C H R O N O U S IDT71 V633 SRAM WITH F L O W - T H R O U G H O UT P U T S B U R S T CO U N T E R , SI NGLE CYCLE D E S E L E C T Integrated Device Technology, Inc. FEATURES: • • • • • • • • 64K x 32 m em ory contiguration

IDT71V416L15PH

Abstract: GS881Z36BGD-150 GS74104AGJ-12 GS882Z36BGB-200 GS8161Z36BGD-250 IDT71V67802S133BGG GS84036AGT-100 IDT71V416L15PHG GS88236BGB-200 GS881Z36BGD-200
Contextual Info: IDT For Industrial Temp: Add "I" at the end of IDT and GSI part number. IDT71P72604S200BQ IDT71P72604S200BQG IDT71P72604S250BQ IDT71P72604S250BQG IDT71P72804S167BQ IDT71P72804S167BQG IDT71P72804S200BQ IDT71P72804S200BQG IDT71P72804S250BQ IDT71P72804S250BQG

Contextual Info: IDT77V012 Data Path Interface DPI to UTOPIA Level 1 Header Translation Device )HDWXU WXUHV /LVW ‹ Utility bus interface for programming PHY devices ‹ Single +3.3V ± 0.3V power supply required ‹ Inputs are +5.0V tolerant ‹ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network

6AD5

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network side of SWITCHStAR DSLAM designs where full header access is needed. Supports VPI Tunneling

IDT70V28L20PFGI

Abstract: IDT72V36110L7-5PFG idt5t93gl161pfi IDT7024L35PFI IDT7024L15PFGI IDT71321LA20PFG IDT71V321L55TFG IDT72V36110L15PFG IDT70V22L20PF IDT70V25L25PFGI
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: A0603-04 Product Affected: Date Effective: Contact: Title: Phone #: Fax #: E-mail: DATE: 5/8/2006 TQFP and PQFP Products (See attached affected part # list)

77V012

Abstract: IDT77155 IDT77V012 IDT77V400 DATA026
Contextual Info: IDT77V012 Data Path Interface DPI to UTOPIA Level 1 Header Translation Device )HDWXU WXUHV /LVW ‹ Utility bus interface for programming PHY devices ‹ Single +3.3V ± 0.3V power supply required ‹ Inputs are +5.0V tolerant ‹ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network

philips diode PH 33J

Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
Contextual Info: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without

ELLS 110

Abstract: SM 8002 DSLAM ALU sm 8013 TS-6 77V012 800B IDT77V012 IDT77V400 256Kx32bit
Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for DSLAM designs utilizing SWITCHStAR where full header access is needed. Supports VPI Tunneling