DM74S112 Search Results

DM74S112

Abstract: DM54S112 DM54S112J DM74S112N J16A N16E
Contextual Info: DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs sition time of the negative going edge of the clock pulse. Data on the J and K inputs can be changed while the clock is high or low without affecting the outputs as long as setup

74s112n

Abstract: 54S112 74S112
Contextual Info: I R C H I L D S E M I C O N D U C T O R TM DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description sition tim e of th e negative going edge o f the clock pulse. Data on the J and K inputs can be changed w hile the clock

C1995

Abstract: DM54S112 DM54S112J DM74S112 DM74S112N J16A N16E
Contextual Info: DM54S112 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops on the falling edge of

preset 100 K

Abstract: DM54S112 DM54S112J DM74S112 DM74S112N J16A N16E
Contextual Info: , June 1989 DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and

74S112

Abstract: 54 dual JK fairchild
Contextual Info: Revised April 2000 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and

74S112N

Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description sition tim e of th e negative going edge o f the clock pulse. Data on the J and K inputs can be changed w hile the clock

Contextual Info: June 1989 DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and

DM74S112N

Abstract: DM54S112 DM54S112J DM74S112 J16A N16E
Contextual Info: DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs sition tim e o f th e negative going edge o f the clock pulse. Data on the J and K inputs can be changed w hile the clock is high o r low w ithout affecting the outputs as long as setup

Contextual Info: S112 National Semiconductor DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and

DM74S112

Abstract: MS-001 N16E
Contextual Info: Revised April 2000 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and

DM74S112

Abstract: MS-001 N16E
Contextual Info: Revised April 2000 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and

Contextual Info: S112 National Semiconductor DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and

master slave jk flip flop

Abstract: ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D
Contextual Info: Logic Products by Function Flip-Flop Products Logic Product Family Product Description Package Voltage Node 74ACT109 FACT ACT Dual JK Positive Edge-Triggered Flip-Flop DIP SOIC TSSOP 5 DM74LS73A Bipolar-LS Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

dm8130

Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Contextual Info: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408

DM74S00N

Abstract: DM74S04N SN74160N DM74S03N DM74S05N DM74S10N DM74S11N 33072x
Contextual Info: N ational Sem iconductor Sem iconductors Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the

DM74367

Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
Contextual Info: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,

sn74h04n

Abstract: DM74S00N DM74S04N SN74L04N SN7401 SN7404N SN74H00N SN74S04N DM74S03N DM74S05N
Contextual Info: N ational Sem iconductor Sem iconductors Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the

DM74S00N

Abstract: DM74S03N DM74S04N DM74S05N DM74S10N DM74S11N SN74L193N DM74S22N
Contextual Info: Sem iconductors N ational Sem iconductor Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the

SN7411N

Abstract: SN74C74N DM74S00N DM74S03N DM74S04N DM74S05N DM74S10N DM74S11N
Contextual Info: N ational Sem iconductor Sem iconductors Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the

mm74c922

Abstract: nte CROSS-REFERENCE SJ 76 A DIODE EMI Quad 2 input nand gate cd 4093 7400 functional cross-reference HST 4047 pinout information of CMOS 4001, 4011, 4070 32-Bit Parallel-IN Serial-OUT Shift Register Fairchild Semiconductor Integrated Circuit Data Catalog 1970 application MM74C926
Contextual Info: Logic Product Catalog Analog Discrete Interface & Logic Optoelectronics July 2002 Across the board. Around the world. Logic Literature Table of Contents Description Literature # Advanced Logic Products Databook CROSSVOLT , Fairchild Switch, TinyLogic™, VHC

ttl ic for multiplexer

Abstract: TTL MULTIPLEXER IC IC DM74S04N TTL 74-series IC B143 sn74151 SN74152 ttl multiplexer ttl 74s DM74S03N
Contextual Info: Sem iconductors N ational Semiconductor Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the

DM74S00

Abstract: DM74S02 DM74S03 DM74S04 DM74S05 DM74S08 DM74S10 DM74S11 DM74S20 DM74S30
Contextual Info: Logic Products by Family Bipolar-Schottky Products Logic Product Function Product Description Package Voltage Node DM74S00 Gate Quad 2-Input NAND Gate DIP SOIC 5 DM74S02 Gate Quad 2-Input NOR Gate DIP 5 DM96S02 Other Dual Retriggerable Resettable Monostable Multivibrator

DM8570

Abstract: DM8520 CV 7599 diode SN7401 DM9093 54175 MT28F400B3WG-8 vox vkw DM7570 logic diagram of 74185 SN54176
Contextual Info: Introduction Here is the new Digital Data Handbook from National. It gives complete specifications for devices useful in building nearly all types of electronic systems, from small instruments to computer designs. For information regarding newer devices introduced since the printing of this handbook, or for further