DM74LS37 Search Results

dm74ls377n

Abstract: DM74LS377 DM54LS377 DM54LS377E DM54LS377J DM54LS377W DM74LS377WM E20A J20A LS377
Contextual Info: DM54LS377 DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable The device is packaged in the

DM74LS377

Abstract: DM54LS377E DM54LS377J DM54LS377W DM74LS377N DM74LS377WM E20A J20A LS377
Contextual Info: DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the

Contextual Info: R C H I I - P S E M IC O N D U C T O R tm DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low pow er Schottky technology. This register consists of eight • 8-bit high speed parallel registers

54LS375DMQB

Abstract: 54LS375FMQB DM74LS375M DM74LS375N J16A LS75
Contextual Info: LS375 ITT NATIONAL SEMICOND -CLOGIO B1E D b5D115E GG7G1Q0 Q EjaI National À jA Semiconductor 'T - ^ U - 0 ' 7- o ci 54LS375/DM74LS375 4-Bit Latch General Description The 'LS375 Is a 4-bit D-type latch for use as temporary stor­ age for binary Information between processing units and in­

Contextual Info: DM54LS373,DM54LS374,DM57LS374,DM74LS373 DM54LS373 DM54LS374 DM74LS373 DM74LS374 TRI-STATE RM Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops Literature Number: SNOS307A DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent

ls375

Contextual Info: LS375 National Semiconductor 54LS375/DM74LS375 4-Bit Latch General Description The 'LS375 is a 4-bit D-type latch for use as temporary stor­ age for binary information between processing units and in­ put/output or indicator units. When its Enable E input is

54LS379

Abstract: 54LS379DMQB 54LS379FMQB 54LS379LMQB DM74LS379 DM74LS379M DM74LS379N E20A LS175 LS379
Contextual Info: 54LS379 DM74LS379 Quad Parallel Register with Enable General Description Features The LS379 is a 4-bit register with buffered common Enable This device is similar to the LS175 but features the common Enable rather than common Master Reset Y Y Y Y Connection Diagram

Contextual Info: February 1992 Semiconductor & DM74LS375 4-Bit Latch General Description The ’LS375 is a 4-bit D-type latch for use as temporary stor­ age for binary information between processing units and in­ put/output or indicator units. When its Enable E input is

DM74LS373

Abstract: DM74LS373N DM74LS373SJ DM74LS373WM DM74LS374 DM74LS374SJ DM74LS374WM IDM29901NC M20D
Contextual Info: Revised March 2000 DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description Features These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and

D1417

Abstract: LS377 54LS377DMQB 54LS377FMQB 54LS377LMQB DM74LS377WM E20A W20A
Contextual Info: National Æ Ü Semiconductor 54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buff­

54LS375DMQB

Abstract: 54LS375FMQB DM74LS375M DM74LS375N J16A LS75 M16A N16E DM74LS375
Contextual Info: LS375 National Semiconductor 54LS375/DM74LS375 4-Bit Latch General Description The ’LS375 is a 4-bit D-type latch for use as temporary stor­ age for binary information between processing units and in­ put/output or indicator units. When its Enable E input is

DM74LS37N

Abstract: C1995 DM74LS37 DM74LS37M M14A N14A
Contextual Info: DM74LS37 Quad 2-Input NAND Buffers General Description This device contains four independent buffer gates each of which performs the logic NAND function Connection Diagram Dual-In-Line Package TL F 6362 – 1 Order Number DM74LS37M or DM74LS37N See NS Package Number M14A or N14A

74ls334

Abstract: 74LS374 DATASHEET 74LS374 74LS373 74ls373 datasheet DM54LS373J DM54LS373W DM74LS373N DM74LS373WM J20A LS373
Contextual Info: DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and

LJ-06A

Abstract: DM54LS377E DM54LS377J DM54LS377W DM74LS377 DM74LS377N DM74LS377WM E20A J20A LS377
Contextual Info: S E M IC O N D U C T O R tm DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features T h e ’L S 3 7 7 is a n 8 -b it re g is te r b u ilt u s in g a d v a n c e d lo w • 8 -b it h ig h s p e e d p a ra lle l re g is te rs p o w e r S c h o ttk y te c h n o lo g y . T h is re g is te r c o n s is ts o f e ig h t

DM74LS37

Abstract: DM74LS37M DM74LS37N M14A N14A fc501
Contextual Info: DM74LS37 Quad 2-Input NAND Buffers General Description This device contains four independent buffer gates each of which performs the logic NAND function. Connection Diagram Dual-ln-Line Package TL/F/6362-1 Order Number DM74LS37M or DM74LS37N See NS Package Number M14A or N14A

DM54LS37J

Abstract: DM74LS37N DM54LS37 DM74LS37 DM74LS37M J14A M14A N14A
Contextual Info: DM54LS37/DM74LS37 Quad 2-Input NAND Buffers General Description This device contains four independent buffer gates each of which performs the logic NAND function. DM54LS37/DM74LS37 National Æ /m Semiconductor Æ Æ Corporation Connection Diagram Dual-ln-Line Package

dm74ls377n

Contextual Info: DM54LS377,DM74LS377 DM54LS377 DM74LS377 Octal D Flip-Flop with Common Enable and Clock Literature Number: SNOS308A DM54LS377 DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low

LS378

Contextual Info: LS378 National Semiconductor 54LS378/DM74LS378 Parallel D Register with Enable General Description Features The ’LS378 is a 6-bit register with a buffered common en­ able. This device is similar to the 'LS174, but with common Enable rather than common Master Reset.

DM74LS373

Abstract: DM74LS373N DM74LS373SJ DM74LS373WM DM74LS374 DM74LS374N DM74LS374SJ DM74LS374WM M20D
Contextual Info: Revised November 2001 DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description Features These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and

dm74ls377n

Contextual Info: S E M IC O N D U C T O R tm DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low pow er Schottky technology. This register consists of eight • 8-bit high speed parallel registers

74ls374n

Abstract: 74LS373N 74LS334 74ls373 buffer ic LOGIC OF 74LS373 74LS373WM dm74ls373n 54LS373J m74ls374n
Contextual Info: S E M IC O N D U C T O R tm DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description The eight latches of th e D M 54/74LS373 are transparent D-type latches m eaning th a t w hile th e enable G is high the

Contextual Info: ZWA National ææ Semiconductor 54LS379/DM74LS379 Quad Parallel Register with Enable General Description Features The LS379 is a 4-bit register with buffered common Enable. This device is similar to the LS175 but features the common Enable rather than common Master Reset.

LS377

Contextual Info: LS377 £ 2 National Semiconductor 54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The 'LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the

DM74LS378N

Contextual Info: May 1992 Semiconductor & DM54LS378/DM74LS378 Parallel D Register with Enable General Description Features The ’LS378 is a 6-bit register with a buffered common en­ able. This device is similar to the ’LS174, but with common Enable rather than common Master Reset.