DM74LS10 Search Results

DM74LS10

Abstract: DM74LS10M DM74LS10N M14A MS-001 N14A
Contextual Info: Revised March 2000 DM74LS10 Triple 3-Input NAND Gate General Description This device contains three independent gates each of which performs the logic NAND function. Ordering Code: Order Number Package Number Package Description DM74LS10M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

DM74LS10N

Abstract: 54LS10 54LS10LMQB DM54LS10J DM54LS10W DM74LS10M E20A
Contextual Info: , June 1989 54LS10/DM54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/

Contextual Info: June 1989 Semiconductor 54LS10/DM54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/

Contextual Info: June 1989 Semiconductor DM54LS107A/DM74LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and

74LS10

Abstract: DM74LS10 DM74LS10N 54LS10 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10M
Contextual Info: DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Features n Alternate Military/Aerospace device 54LS10 is available. Contact a Fairchild Semiconductor Sales

DM74LS109AN

Abstract: DM54LS109AW DM74LS109A DM74LS109AM J16A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ
Contextual Info: DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the

Contextual Info: LS10 £ 2 National Semiconductor 54LS10/DM54LS10/DM74LS10 Triple 3-lnput NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is avaiiable. Contact a National Semiconductor Sales Office/

Contextual Info: 54LS10,DM54LS10,DM74LS10 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates Literature Number: SNOS277A 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function

54LS10DMQB

Abstract: DM74LS10N 54LS10 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10 DM74LS10M E20A
Contextual Info: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which perform s the logic N AND function. Features • A lternate M ilitary/Aerospace device 54LS10 is available. C ontact a Fairchild Sem iconductor Sales

DM74LS107AN

Abstract: DM54LS107A DM54LS107AJ DM54LS107AW DM74LS107A DM74LS107AM J14A M14A N14A W14B
Contextual Info: DM54LS107A DM74LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops on the falling edge of

Contextual Info: June 1989 54LS10/DM54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/

Contextual Info: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which perform s the logic NAND function. Features • Alternate M ilitary/Aerospace device 54LS10 is available. C ontact a Fairchild Sem iconductor Sales

DM74LS109A

Abstract: DM74LS109AM DM74LS109AN M16A MS-001 N16E
Contextual Info: Revised March 2000 DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the

Contextual Info: 54LS109,DM54LS109A,DM74LS109A 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J- Flip-Flops with Preset, Clear, and Complementary Outputs Literature Number: SNOS278A 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs

54LS10

Abstract: DM74LS10 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10 DM54LS10J DM54LS10W DM74LS10M DM74LS10N
Contextual Info: 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function Y Alternate Military Aerospace device 54LS10 is available Contact a National Semiconductor Sales Office

DM54LS10

Abstract: DM54LS10J DM74LS10 DM74LS10M DM74LS10N J14A M14A N14A
Contextual Info: DM54LS10/DM74LS10 P 5 K I National /¿ /m Semiconductor Æ Æ Corporation DM54LS10/DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Connection Diagram Dual-ln-Llne Package

54LS109

Abstract: 54LS109DMQB 54LS109FMQB DM54LS109A DM54LS109AJ DM54LS109AW DM74LS109A DM74LS109AM DM74LS109AN J16A
Contextual Info: 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs The J and K data is accepted by the flip-flop on the rising edge of the

Contextual Info: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Features • Alternate Military/Aerospace device 54LS10 is available. Contact a Fairchild Semiconductor Sales

6367-1

Contextual Info: LS107A National Semiconductor DM54LS107A/DM74LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and

6349-1

Abstract: It83
Contextual Info: LS10 National Semiconductor 54LS10/DM54LS10/DM74LS10 Triple 3-lnput NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is avail­

master slave jk flip flop

Abstract: ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D
Contextual Info: Logic Products by Function Flip-Flop Products Logic Product Family Product Description Package Voltage Node 74ACT109 FACT ACT Dual JK Positive Edge-Triggered Flip-Flop DIP SOIC TSSOP 5 DM74LS73A Bipolar-LS Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

Motorola transistor smd marking codes

Abstract: 7900801CA lm6482a 5962-8993001MIA replacement for 11c90 TRANSISTOR SMD MARKING CODE QA LM311 SMD JM38510/10305BEA LM714h Motorola semiconductor smd marking codes
Contextual Info: N MILITARY / AEROSPACE DESIGN/PROCESS CHANGE NOTIFICATION PCN Nr: 1998 Listing GIDEP Nr: GIDEP Category: Issued: 01/06/98 TRB Nr: This is to advise you that a Design and/or Process Change will be made to the following MIL/AERO product s : Product ID (Description):

Contextual Info: Z9A National SLA Semiconductor 54LS109/DM54LS109A/DM74LSJI09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and