92360 Search Results

Contextual Info: MINIATURE RIBBON CONNECTORS 37X-9 Series KYCON Ordering Information Click here for more information Plugs Receptacles Contacts Contacts Part Number Part Number 24 37X-92240 24 37X-91240 36 37X-92360 36 37X-91360 50 37X-92500 50 37X-91500 Mounting Options PCB

Contextual Info: MINIATURE RIBBON CONNECTORS 37X-9 Series KYCON Ordering Information Plugs Receptacles Contacts Contacts Part Number Part Number 24 37X-92240 24 37X-91240 36 37X-92360 36 37X-91360 50 37X-92500 50 37X-91500 Mounting Options PCB 12 - 4-40 Riveted Threaded Mounting Holes

TUU5174

Abstract: 37-91240-12
Contextual Info: KYCON Miniature Ribbon Connectors KYCON Right Angle P.C. Mount Miniature Ribbon Connectors * Ordering Information 15.500 ± 0.250 Receptacles With Spring Latch and 4-40 Threaded Mounting Holes Contacts Part Number 24 37-92240-12 36 37-92360-12 50 37-92500-12

c6090

Abstract: transistor c6090 c6090 equivalent Datasheet C6090 F660BVX Commscope RG6 F677TSVV Commscope 412 P1 belden 9301 Commscope 500 P1 EFI500W3
Contextual Info: LRC TERMS & CONDITIONS MINIMUM ORDER LIMITED WARRANTY RETURN $5,000.00 Seller’s liability under this warranty is limited to the repair or replacement of any unit which proves, in the reasonable opinion of Thomas & Betts, to be defective in material or workmanship under

FIREWIRE 800

Abstract: SL730 SL755
Contextual Info: Bus Interface SL730 IEEE1394a Mixed Signal PHY Layer D A T A S H E E T Major product features: • Compliant with IEEE 1394a V2.0 specification RAM • Interoperates with 1394-1995 devices • Supports transfer rates of 100, 200 or 400 Mbps pbus SL755 Annex-J

design of dma controller using vhdl

Abstract: FPGA based dma controller using vhdl timing diagram of DMA Transfer CY39100V676-200MBC
Contextual Info: Microprocessor Peripherals FPGA/CPLD IP Inventra DMAx1-B1 DMA Controller FISPbus INTERFACE DMA_END DMA A REGISTER INTERFACE FISPbus INTERFACE D FTS FTR DMAx1-B1 IR 2 DMA B SYSTEM DMA_REQ A S H E E T DMAx1-B1 key features: • Single-channel DMA controller with

FIREWIRE 800

Abstract: Mentor SL738 SL755 TSB14C01 PD-11025
Contextual Info: Bus Interface SL738 IEEE1394a Backplane PHY D A T A S H E E Major product features: RAM • Operates in both 1394-1995 and 1394a backplanes • Implements 1394a Backplane PHY register set • Supports transfer rates of 50 and 100 Mbps pbus SL755 Annex-J SL738

block diagram for asynchronous FIFO

Abstract: high level block diagram for asynchronous FIFO PD-11024 PD11024 SL730 SL755 SL770
Contextual Info: Bus Interface SL770 A/V Port IEEE1394a Audio/Video Link Layer pbus App-specific HW Application Interface D A T A S H E E T Major product features: • Compliant with IEEE 1394a Link Layer specification RAM RAM • Supports IEC 61883 standard FIFO FIFO CTRL

EATON CM20A

Abstract: A5 GNE mosfet Hall sensor 44e 402 2N8491 FTG 1087 S TRIAC BCR 10km FEB3T smd transistor marking 352a sharp EIA 577 sharp color tv schematic diagram MP-130 M mh-ce 10268
Contextual Info: Table of Contents N E W A R K E L E C T R O N IC S “Where serving you begins even before you call” Newark Electronics is a UNIQUE broadline distributor of electronic components, dedicated to provid­ ing complete service, fast delivery and in-depth inventory. Our main

vhdl code for Clock divider for FPGA

Abstract: vhdl code for i2c master
Contextual Info: Bus Interface FPGA/CPLD IP Inventra MI2C-B1 I2C Bus Interface CLK CLOCK DIVIDER D OSCL CONTROLLER A T A S H E E T MI2C key features: • Master or slave operation • Multi-master systems supported • Allows 10-bit addressing with I2C bus A2 A1 A0 DI OSDA

verilog code for MII phy interface

Contextual Info: Inventra Soft Core RTL IP PE-MSTAT™ Statistics Module for PE-MACMII ™ /PE-GMAC0™ PE-MAC Product Families Tx Data Tx Status MAC Control Optional Interface modules PHY Tx Control A S H E E T Receive Function PE-MACMII and PE-GMAC0 Ethernet MAC families

G711

Abstract: G711-CMP G711-EXP u 711
Contextual Info: SPEECH CODECS INVENTRA TM T H E I N T E L L I G E N T A P P R O A C H T O I N T E L L E C T U A L P R O P E R T Y G711 - EXP G.711 PCM EXPANDING FUNCTION F E AT U R E S DELIVERABLES u Expands 8 bit logarithmic A or Mu-law PCM to 13/14 bit linear PCM u Purely combinational logic implementation

MII PHY verilog code for phy interface

Abstract: RTL code for ethernet alcatel 1603 verilog code for 100 mbps ethernet
Contextual Info: PE-MACMII 10/100 Mbps Dual-Speed Ethernet MAC Inventra™ Soft Core RTL IP D A T A S H E E T Major Product Features: • Supports 10 or 100Mbps MII-based PE-MACMII Data Host Data Streams (Tx and Rx) 10/100 Mbps Dual-Speed Ethernet MAC Host CPU Access

Mac Mentor

Contextual Info: Inventra Soft Core RTL IP PE-ENDEC ENDEC I/F for PE-MACMII™ Ethernet MAC Tx Data Tx Data PEMCS Tx Status PETFUN PE10T Endec Interface Module Rx Data Rx Status A T A S H E E T Major Product Features: PE-MACMII Core HOST D PERFUN Tx Control • Works with Alcatel PE-MACMII

CODE VHDL TO ISA BUS INTERFACE

Abstract: M1284H VHDL Bidirectional Bus
Contextual Info: BUS INTERFACE TM INVENTRA T H E I N T E L L I G E N T A P P R O A C H T O I N T E L L E C T U A L P R O P E R T Y M1284H HOST PARALLEL PORT OVERVIEW The M1284H is a host-based multi-function parallel port that may be used to transfer data between a host PC and

6502 microprocessor

Abstract: plessey cla 3000 crompton K-50-50 ferranti ztx SP92701 draw pin configuration of ic 7404 SP9754
Contextual Info: DATA CONVERTERS & Voltage References IC Handbook APLE SSE Y Sem iconductors Foreword The collective description of Data Conversion covers a vast range of applications which is limited only by the imagination of today’s system designers. Traditionally the name of Plessey

FIREWIRE 800

Abstract: IL700
Contextual Info: Bus Interface iL700 1394a Testbench and Validation Suite D A T A S H E E T Major product features: • Provides thorough coverage of 1394a-compliant asynchronous and isochronous Link behavior • Simple interface for easy addition of tests and applications

vhdl source code for 8086 microprocessor

Abstract: addressing modes 8086 8086 vhdl Intel 8080 CPU Diagram verilog code for 8086 interrupt controller verilog code M8259A intel 8080 microprocessor 8080 interrupt of microprocessor 8086
Contextual Info: MICROPROCESSOR PERIPHERAL TM INVENTRA T H E I N T E L L I G E N T A P P R O A C H T O I N T E L L E C T U A L P R O P E R T Y M8259A INTERRUPT CONTROLLER OVERVIEW The M8259A is a programmable interrupt controller KEY FEATURES capable of handling eight vectored priority interrupts.

54S38

Abstract: SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A
Contextual Info: m - G EN ER A L IN F O R M A TIO N INDEXES Numerical • Functional/Selection Guide O R D E R IN G INSTRUCTIO NS A N D M E C H A N IC A L D ATA 1 1 5 4/74 F A M IL Y SSI C IR CU ITS 2 I 54/74 F A M IL Y M S I/LSI C IR C U ITS 3 S E R IE S 29000 S S I C IR C U IT S

verilog code to generate square wave

Abstract: verilog code for four bit binary divider alarm clock verilog code M146818 vhdl code for 16 BIT BINARY DIVIDER square-wave generator verilog interrupt controller verilog code interrupt controller verilog code download squarewave generator MC146818
Contextual Info: MICROPROCESSOR PERIPHERAL TM INVENTRA T H E I N T E L L I G E N T A P P R O A C H T O I N T E L L E C T U A L P R O P E R T Y M146818 REAL-TIME CLOCK OVERVIEW The M146818 combines a complete time-of-day clock with an alarm, a 100-year calendar, a programmable periodic

UTM RESISTOR

Abstract: MUSBHDRC MUSBHDRC USB2.0 High-Speed Dual-Role Controller verilog code for amba ahb bus verilog code for amba ahb master verilog code AMBA AHB UTM power RESISTOR verilog code for frame synchronization AMBA AHB bus protocol Mentor
Contextual Info: Soft Core RTL IP Inventra MUSBHDRC USB2.0 High-Speed Dual-Role Controller D A T A S Endpoint Control EP0 Control - Host EP0 Control - Function EP1 - 15 Control Combine Endpoints DMA Requests Transmit IN Host Transaction Scheduler Interrupt Control Interrupts

types of trees in data structure

Abstract: PE-MCXMAC MII PHY verilog code for phy interface triple-speed ethernet verilog code for MII phy interface gmii phy
Contextual Info: Inventra Soft Core RTL IP PE-MCXMAC™ Triple-Speed Ethernet MAC D A T A S H E E T Major Product Features: PE-MXCMAC Core HOST Tx Data Tx Status Rx Data Rx Status Tx Data PETMC • Operates at 10, 100 or 1000 Mbps GMII PHY PETFN Tx MAC Control • Meets IEEE 802.3, 802.3u, 802.3x,

slot machine block diagram vhdl

Abstract: MPCI32 vhdl code dma controller ,vhdl code for implementation of eeprom 32Bit verilog code for pci to pci bridge pci verilog code verilog code for EEPROM Controller
Contextual Info: Inventra MPCI32 Soft Core RTL IP 32bit 33/66MHz PCI Core w/Cardbus support PCI Bus / Cardbus D A T A S H E E T Major Product Features: • Fully compliant with PCI v2.2 specification PCI Core for Peripheral Apps. PCI Bus Interface Target Register Interface

vhdl code for 8 bit common bus

Abstract: vhdl code for memory card output data flash card pcmcia flash memory vhdl code verilog code for 16 bit common bus ST93CS56 vhdl code for common bus 16 bits
Contextual Info: Inventra MPCMCIA1 PCMCIA PC Card Interface Soft Core RTL IP D Address Bits 1 - 25 I/O Read and Write Strobes Attribute Memory Enable Common Memory Enables PCMCIA I/F I/O Enables Configuration Registers T A S H E E T Major Product Features: • Conforms to PCMCIA PC Card