8-BIT FLAG REGISTER Search Results

Contextual Info: SN74ALS29833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS119D - FEBRUARY 1987 - REVISED JANUARY 1995 Functionally Similar to AMD’s AM29833 High-Speed Bus Transceiver With Parity Generator/Checker Parlty-Error Flag With Open-Collector Outputs Register for Storing the Parity-Error Flag

54ACT11853

Abstract: 74ACT11853
Contextual Info: 54ACT11853, 74ACT11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS SCAS389 – MARCH 1990 • • • • • • • • • High-Speed Bus Transceivers with Parity Generator/Checker Parity-Error Flag Open-Drain Output Register for Storage of the Parity Error Flag

54AC11833

Abstract: 74AC11833
Contextual Info: 54AC11833, 74AC11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS SCAS387 – MARCH 1990–REVISED OCTOBER 1990 • • • • • • • • High-Speed Bus Transceivers With Parity Generator/Checker Parity-Error-Flag Open-Drain Output Register for Storage of the Parity-Error Flag

Contextual Info: 54AC11853, 74AC 11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS TI0157— D3473, MARCH 1990 54AC11B53 . . . JT PACKAGE 74AC11853 . . . DW OR NT PACKAGE High-Speed Bus Transceivers with Parity Generator/Checker TOP VIEW Parity Error Flag Open-Drain Output • Register for Storage of the Parity Error Flag

Contextual Info: SN74ALS29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS118C - FEBRUARY 1987 - REVISED JANUARY 1995 Functionally Similar to AMD's AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parlty-Error Flag With Open-Collector Outputs Latch for Storing the Parlty-Error Flag

54ACT11138

Abstract: 54ACT11833 74ACT11138 74ACT11833 ACT11833
Contextual Info: 54ACT11833, 74ACT11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS SCAS388 – MARCH 1990 • • • • • • • • • Inputs are TTL-Voltage Compatible High-Speed Bus Transceivers with Parity Generator/Checker Parity-Error Flag Open-Drain Output Register for Storage of the Parity-Error Flag

EB642

Abstract: HCS08
Contextual Info: Freescale Semiconductor Engineering Bulletin EB642 Rev. 0, 10/2004 Clearing the Receive Data Register Full Flag in the SCI During 9-Bit Data Mode Covers HCS08 Microcontrollers By: Scott Pape 8/16-Bit Systems Engineering Austin, Texas Introduction This bulletin clarifies how to clear the receive data register full RDRF flag in the serial communications

accumulator

Contextual Info: A LIST OF ERRATA F2MC-8L FAMILY 8-BIT MICROCONTROLLER ASSEMBLER MANUAL Table5.1 List of Pseudo Machine Instructions P74 CM25-00201-3EA Feb 1999 Wrong: Others Operation Branch Pseudo machine instruction Function BV rel Branch if V flag = 1 BNV rel Branch if V flag = 0

SA00238

Contextual Info: Philips Semiconductors Product specification 8-bit transceiver with 9-bit parity checker/ generator and flag latch 3-State 74ABT853 The 74ABT853 is an octal transceiver with a parity generator/checker and is intended for bus–oriented applications. FEATURES

Contextual Info: Philips Semiconductors Product specification 8-bit transceiver with 9-bit parity checker/generator and flag latch 3-State FEATURES 74ABT853 The 74ABT853 is an octal transceiver with a parity generator/checker and is intended for bus-oriented applications.

Contextual Info: 54ACT11853,74ACT11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS D3474, MARCH 1990-REVISED OCTOBER 1990 54ACT11853. . . JT PACKAGE 74ACT11853 . . . DW OB NT PACKAGE TOP VIEW High-Speed Bus Transceivers With Parity Generator/Checker Parity-Error-Flag Open-Drain Output

Contextual Info: 54AC11833,74AC11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS D3448, MARCH 1990-REVISED OCTOBER 1990 54AC11833 . . . JT PACKAGE 74AC11833 . . . DW OR NT PACKAGE High-Speed Bus Transceivers With Parity Generator/Checker TOP VIEW Parity-Error-Flag Open-Drain Output

54ACT11853

Abstract: 74ACT11853 D3474
Contextual Info: 54ACT11853, 74ACT11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS D3474, MARCH 1990-REV1SED OCTOBER 1990 54ACT11853 . . . JT PACKAGE 74ACT11853 . . . OW OB NT PACKAGE TOP VIEW High-Speed Bus Transceivers With Parity Generator/Checker Parity-Error-Flag Open-Drain Output

74AC

Contextual Info: 54AC11853, 74AC11853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS D3473, MARCH 1990 54AC1-I853 . . . JT PACKAGE 74AC11853 . . . DW OR NT PACKAGE TOP VIEW High-Speed Bus Transceivers With Parity Generator/Checker Parity-Error-Fiag Open-Drain Output Register for Storage of the Parity-Error Flag

LOW-VOLTAGE

Abstract: reset circuit flag register
Contextual Info: Fujitsu Microelectronics Shanghai Co., Ltd. Application Note MCU- AN-500011-E-11 F²MC-8FX FAMILY 8-BIT MICROCONTROLLER MB95200H/210H SERIES LOW-VOLTAGE DETECTION RESET CIRCUIT APPLICATION NOTE LVD WITH RESET FLAG REGISTER V1.1 Revision History Revision History

Contextual Info: S ignetics Advanced BiCMOS Products O bjective specification 8-bit transceiver with 9-bit parity checker/ generator and flag latch 3-State FEATURES • • Low static and dynamic power dissi­ pation with high speed and high out­ put drive Open-collector ERROR output

Contextual Info: Philips Semiconductors-Signetics Document No. 853-1098 ECN No. 01347 Date ot issue January 2,1991 Status Product Specification FAST 74F552 Transceiver TYPE FAST Products ty pk ^ 74F552 FEATURES • 8-Bit bidirectional I/O port with handshake • Register status flag flip-flops

Contextual Info: 3.3 VOLT DUAL MULTIMEDIA FIFO DUAL 256 x 8, DUAL 512 x 8 DUAL 1,024 x 8, DUAL 2,048 x 8 DUAL 4,096 x 8 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs designated FIFO A and FIFO B has a 8-bit input

Contextual Info: 3.3 VOLT DUAL MULTIMEDIA FIFO DUAL 256 x 8, DUAL 512 x 8 DUAL 1,024 x 8, DUAL 2,048 x 8 DUAL 4,096 x 8 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs designated FIFO A and FIFO B has a 8-bit input

1N3064

Abstract: 1N916 SN74ALS29854
Contextual Info: SN74ALS29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS118C – FEBRUARY 1987 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE TOP VIEW Functionally Similar to AMD’s AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector

application of parity checker

Abstract: 1N3064 1N916 SN74ALS29833
Contextual Info: SN74ALS29833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS119D – FEBRUARY 1987 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE TOP VIEW Functionally Similar to AMD’s AM29833 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector

1N3064

Abstract: 1N916 SN74ALS29854 SN74ALS29854NT3
Contextual Info: SN74ALS29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS118C – FEBRUARY 1987 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE TOP VIEW Functionally Similar to AMD’s AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector

Contextual Info: SN74ALS29833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS119D – FEBRUARY 1987 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE TOP VIEW Functionally Similar to AMD’s AM29833 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector

Contextual Info: SN74ALS29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS118C – FEBRUARY 1987 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE TOP VIEW Functionally Similar to AMD’s AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parity-Error Flag With Open-Collector