7T777 Search Results

BI71

Contextual Info: HM5283206 Series 131,072-word x 32-bit x 2-bank Synchronous Graphic RAM HITACHI ADE-203-223A Z Rev. 1.0 May. 30, 1996 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5283206 provides 2 banks to realize better performance. 8 column block write function and write per bit function are provided for

KM6865BP-20

Abstract: KM6865BP-15
Contextual Info: KM6865B CMOS SRAM 8 K x 8 Bit High Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Tim e 12 ,15, 20,25ns Max. The KM865B is a 65,536-bit high-speed Static Random • Low Power D issipation Access Memory organized as 8,192 words by 8 bits.

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT ¿¿PD4 2 1 6 4 0 5 16 M BIT DYNAMIC RAM 4M-WORD BY 4-BIT, HYPER PAGE MODE Description The /iPD4216405 is a 4,194,304 words by 4 bits dynamic CM OS RAM w ith optional hyper page mode. Hyper page m ode is a kind of the page mode and is useful for the read operation.

A673 transistor

Abstract: transistor a673 b627 transistor B734 transistor a639 transistor B722 TRANSISTOR DATA diode PJ 966 transistor bc29 pj 939 diode B627
Contextual Info: Order this document as AN441/D MOTOROLA SEM ICO N D U CTO R APPLICATION NOTE AN441 MC68HC05E0 EPROM Emulator By Peter Topping MCU Applications Group Motorola Ltd, East Kilbride INTRODUCTION The MC68HC05E0 isa versatile member of the M6805 family of microprocessors. Unlike most other versions

LH21256-12

Abstract: LH21258-15 LH21257-12 LH21256 AE12A lh21257
Contextual Info: LH21256/7/8 FEATURES 262,144 x 1 bit organization Access times: 100/120/150 ns MAX. Cycle times: 200/230/260 ns (MIN.) Page mode operation (LH21256) ^ Nibble mode operation (LH21257) ^ Byte mode operation (LH21258) Power supply: +5 V ± 10% NMOS 256K (256K x 1) Dynamic RAM

hi1179

Abstract: H11179
Contextual Info: H!1179 Semiconductor 8-Bit, 35 MSPS, Video A/D Converter August 1997 Description Features Resolution 8 -B it. ±0.5 LSB DNL The H 11179 is an 8-bit CMOS analog-to-digital converter for video use that features a sync clamp function. The adoption

800LE

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT _ / I P D 4 2 S 1 7 8 0 0 , 4 2 1 7 8 0 0 16 M BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE D escription TheixPD42S17800, 4217800 are 2,097,152 words by 8 bits CMOS dynamic RAMs. The fast page mode capability realize high speed access and low power consumption.

777T7

Contextual Info: NEC MOS INTEGRATED CIRCUIT / ¿P D 4 2 1 6 4 0 5 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, HYPER PAGE MODE DESCRIPTION The /iPD4216405 is a 4 194 304 words by 4 bits dynamic CMOS RAM with optional hyper page mode. Hyper page mode is a kind of the page mode and is useful for the read operation.

IR receiver TK 19 527

Abstract: TLD 721 5FW-4 Fm 6721 transformer
Contextual Info: DP8344B National ÆLm Semiconductor DP8344B Biphase Communications Processor— BCP G eneral Description although a TTL-level serial input is also provided for applica­ tions where an external comparator is preferred. The DP8344B BCP is a communications processor de­

Contextual Info: HM5221605 Series Preliminary 65,536-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI A ll inputs and outputs are referred to the rising edge of the clo ck input. The HM5221605 is offered in 2 banks for improved performance. Features Rev. 0.1 Sep. 22,1994

MPC1490

Abstract: mPD6125ACA PD6125A SE303A-C simple ir remote controll circuit XRL Series 200H AIPD6125ACA-XXX IPD6125AG-XXX 24PIN
Contextual Info: £ * - J . M O S INTEGRATED C IR C U IT PD6125A M U L T I-P U R P O S E REMOTE CO NTRO L T R A N S M IT T E R CMOS IC LSI T he /JP D 6125A is intended fo r ap plicatio ns in infrared re m o te -co n tro l tra n sm itte rs fo r c o n tro llin g T V , VC R ,

A10AL

Abstract: TC538200AFT
Contextual Info: TO SH IB A TC538200AP/AF/AFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 8 MBIT 512 K WORD BY 16 BITS/1 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC538200AP/AF is a 8,388,608-bit Read Only Memory organized as 524,288 words by 16 bits when BYTE is logical high, and as 1,048,576 words by 8 bits when BYTE is logical low.

Contextual Info: IN T E L CORP -CMEMORY/LOGIC} n 4826176 IN TEL CORP M EM O RY/LO G IC i>Ë| LiüHblTfc, O D S ä ^ S 99D 58935 D 29C13 AND 29C14 CHMOS COMBINED SINGLE-CHIP PCM CODEC AND FILTER AT&T D3/D4 and CCITT Compatible 29C14 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability

HM65256BLP-10

Abstract: dp - 20t DG250 HM65256BFP-12T HM65256B HM65256BFP-10T HM65256BFP-15T HM65256BFP-20T HM65256BLFP-10T HM65256BLFP-12T
Contextual Info: HM65256B Series 5.0 V S u p p ly 32,768-w ord x 8-bit H ig h S p e e d P s u e d o S ta tic R A M Features • Single 5 V ±10% • Access time — CE access time: 100/120/150/200 ns — Address access time: 50/60/75/100 ns (in static column mode) • Cycle time

Contextual Info: SEMICONDUCTOR TECHNICAL DATA KIA6072AF b i p o l a r l i n e a r i n t e g r a t e d c ir c u it FM PROCESSOR KIA6072AF is an LSI designed for car-tuner. built in FM IF detector, noise canceller and stereo decoder on single chip, the space merit is improved,

D42S17805

Abstract: 42S17805 7805G PD4217805 S17805
Contextual Info: DATA SHEET NEC / M O S INTEGRATED CIRCUIT / /¿PD42S17805, 4217805 16 M -B IT D YN AM IC RA M 2 M -W O R D BY 8-BIT, H YPER PAGE M O DE Description The jiPD42S17805,4217805 are 2,097,152 words by 8 bits CMOS dynamic RAMs with optional hyper page mode. Hyper page mode is a kind of the page mode and is useful for the read operation.

TC59G1631

Contextual Info: TO SHIBA TC59G1631AFB-80.-10.-12 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 262,144-WORD x 2-BANK x 32-BIT SYNCHRONOUS GRAPHICS RAM DESCRIPTION The TC59G1631AFB is a CMOS synchronous graphics random access memory organized as 262, 144

ltls

Abstract: MARK M2W SI03 256kx4 vram IRFH fscj V52C4258
Contextual Info: JON i 2 '982 V V'TELIC V52C4258 MULTIPORT VIDEO RAM WITH 256K X 4 DRAM AND 512 X 4 SAM HIGH PERFORMANCE V52C4258 80 10 Max. RAS Access Time, tnAC 80 ns 100 ns Max. CAS Access Time, (tcAc) 25 ns 25 ns Max. Column Address Access Time, (t*) 45 ns 50 ns Min. Fast Page Mode Cycle Time, (tPC)

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT MC-422000AA64 2 M-WORD BY 64-BIT DYNAMIC RAM MODULE FAST PAGE MODE Description The MC-422000AA64 is a 2,097,152 words by 64 bits dynamic RAM module on which 8 pieces of 16 M DRAM: JUPD4218160 are assembled. This module provides high density and large quantities of memory in a small space without utilizing the surfacemounting technology on the printed circuit board.

k357

Abstract: a21s0
Contextual Info: Am2130/Am 2140 1 0 2 4 x 8 Dual-Port Static Random-Access Memories > 3 DISTINCTIVE CHARACTERISTICS True dual port operation Access time as fast as 55 ns Master device Am2130 has on-chip arbitration Expandable data bus width in multiples of 6 bits using one master (Am2130) and required number of slave

Contextual Info: NN511000 series Fast Page Mode CMOS 1Mx 1bit Dynamic RAM NPN a DESCRIPTION The NN511000 series is a high performance CMOS Dynamic Random Access Memory organized as 1,048,576 words by 1 bit. The NN511000 series is fabricated with advanced CMOS technology and designed with innovative design tech­

tea 6200

Abstract: 4000B 74AC 74HC 74HCT ADC4204
Contextual Info: I Ofy *ip The World Resource for Precision Signal Technology ADC4204 Low Power, 16-Bit, 86 kHz Sampling A /D Converter Perform ance Features Features The ADC4204 is a 16-bit, low-power CMOS monolithic sampling A/D converter implemented with the successive approximation technique and with self-calibration to ensure true 16-bit ac­

NEC uPD 833

Abstract: NEC 4216160
Contextual Info: NEC / DATA SHEET MOS INTEGRATED CIRCUIT _ ^uPD42S16160,4216160,42S18160,4218160 1 6 M - B IT D Y N A M IC R A M 1 M -W O R D B Y 1 6 -B IT , F A S T P A G E M O D E , B Y T E R E A D / W R IT E M O D E Description T h e ^ P D 4 2 S 1 6 1 6 0 , 4 2 1 6 1 6 0 , 4 2 S 1 8 1 6 0 , 4 2 1 8 1 6 0 a re 1 ,0 4 8 , 5 7 6 w o rd s b y 16 b its C M O S d yn a m ic R A M s. T h e

Cd 2111c

Abstract: PCF2112 2111C S26TT 2s531 PCF2111CT
Contextual Info: Philips Semiconductors Product specification LCD drivers PCF21XXC family FEATURES G ENERAL DESCRIPTION • Supply voltage 2.25 to 6.0 V The m em bers of the PCF21XXC family are single-chip, silicon gate CMOS circuits. A 3-line bus CBUS structure enables serial data transfer with m icrocontrollers. All