7C402 Search Results

27c402k

Abstract: M5M27C402 27C402 27C402K-15 27C402K-12
Contextual Info: MITSUBISHI LSIs M5M2 7C402K-12, - 15 4 1 9 4 3 0 4 -B IT 2 6 2 1 4 4 -W O R D BY 16-BIT CM OS E R A S A B L E AND ELEC TR ICA LLY R EP R O G R AM M ABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The Mitsubishi M 5M 7C402K is a high-speed 4194304-bit

C401 diode

Abstract: 10DC IR transistor 10dc ir C4016 C4019 C401 CY7C401 CY7C402 CY7C403 C4013
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features words. Both the CY7C403 and CY7C404 have an output enable OE function. • 64 x 4 (CY7C401 and CY7C403) 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 s CYPRESS SEMICONDUCTOR Cascadeable 64 x 4 FIFO and 6 4 x 5 FIFO Features Functional Description • 64 x 4 CY7C401 and CY7C403 64 X 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO ) T he CY7C401 and CY 7C403 are asynchronousfirst-in first-out m em ories (F IF O s)

C40110

Abstract: C401-16
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features cading. The output ready OR signal is a flag to indicate the output contains valid data (HIGH), to indicate the FIFO is empty (LOW), and to provide a signal for cascading.

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

81c78

Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M

7C402

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS SEMICONDUCTOR Cascadable 64 x 4 FIFO and 6 4 x 5 FIFO Functional Description • 64 X 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO) The CY7C401 and CY7C403 are asynch­

IRC2D

Abstract: 5L0F
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 ss CYPRESS SEMICONDUCTOR Cascadeable 64 x 4 FIFO and 64 x 5 FIFO Features • 64 x 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) H igh speed first-in first-out memory (FIFO) • Processed with high-speed C M O S for optimum

C4017

Abstract: diode 10dc C4015 C-4017 C401 CY7C401 CY7C402 CY7C403 CY7C404 CY7C401-10DMB
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 The devices accept 4Ć or 5Ćbit words at the data input DI0 - DIn under the control of the shift in (SI) input. The stored words stack up at the output (DO0 - DOn) in the order they were entered. A read command on the shift out (SO) input causes the next

cy3341

Abstract: 7C401 cy7c405 EME-6300H 7C404
Contextual Info: Qualification Report April, 1993, QTP# 7191 & 9504, Version 1.0 64 x 4 and 64 x 5 Cascadeable FIFOs MARKETING PART NUMBER DEVICE DESCRIPTION CY3341 CY7C405 64 x 4 Serial Memory FIFO CY7C401/403 64 x 4 Cascadeable FIFO 7C402/404 64 x 5 Cascadeable FIFO PRODUCT DESCRIPTION (for qualification)

MSM 6290

Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

C401

Abstract: CY7C401 CY7C402 CY7C403 CY7C404 C4015 diode 10dc
Contextual Info: 02 CY7C401/CY7C403 7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features words. Both the CY7C403 and CY7C404 have an output enable OE function. • 64 x 4 (CY7C401 and CY7C403) 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

M5M27C402K

Abstract: M5M27C402 M5M27C402K-12
Contextual Info: M ITSU BISHI LÖIS 7C402K-12, - 15 4194304-BIT 262144-WORD BY 16-BIT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M 5 M 2 7 C 4 0 2 K is a high-speed 4 1 9 4 3 0 4 -b it PIN CONFIGURATION (TOP VIEW) ultraviolet erasable and electrically reprogrammable read

M5M27C402

Abstract: 27C402K-15 27C402K-12 M5M27C402K 27C402 27c402k
Contextual Info: MITSUBISHI LSIs M 5M 7C402K-12, - 15 ¿AV’ 4 1 9 4 3 0 4 -B IT 2 6 2 144-WORD BY 16-BIT CMOS ERASABLE AND ELECTRICA LLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M 5M 27C 402K is a high-speed 4194304-bit ultraviolet erasable and electrically reprogrammable read

EPM5128LC

Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C

C4016

Abstract: C4014 C401 diode CY7C404-25DMB C401 CY7C401 CY7C402 CY7C403 CY7C404 C4019
Contextual Info: 1CY 7C40 2 CY7C401/CY7C403 7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features words. Both the CY7C403 and CY7C404 have an output enable OE function. • 64 x 4 (CY7C401 and CY7C403) 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

7C403-10PC

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS Features 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO • Pin compatible with M M I 67401A/67402A • 64 x 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO) • Processed with high-speed CMOS for

4015P

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS SEMICONDUCTOR Cascadeable 64 x 4 FIFO and 64 x 5 FIFO Features Functional Description • 6 4 x 4 CY7C401 an d C Y7C 403 64 x 5 (C Y 7C 402 an d C Y7C 404) H igh -sp eed first-in first-ou t m em ory (FIFO ) • P rocessed w ith h igh -sp eed C M O S for

27HC642

Abstract: 39C10B PAL22V10APC CY2254SC-1 7132SA70 93L422AM 7024S15 7130SA25 7C198-45C 7006S
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

EPM5128LC

Abstract: EPM5128GC epm5064lc-1 EPM5128LC1 59628867809r 5962-8984106LX EPM5128GI 7C19945DMB EPM5130GC-1 5962-8867812rx
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 5962-8753903LX 5962-8753902LX CY21L49-55C CY21L49-45C CY7C281 CY7C281A 5962-8863701LX 5962-8753902LX CY6116A-45C CY6116A-35C CY7C286 CY27H512 5962-8867003LX 5962-8867002LX CY6116A-55C CY6116A-45C

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS SEMICONDUCTOR Cascadeable 64 x 4 FIFO and 64 x 5 FIFO Features • 64 x 4 CY7C401 and CY7C403 64 x S (7C402 and CY7C404) High speed first-in first-out memory (FIFO) • Processed with high-speed CMOS for optimum

7c403

Abstract: CY7C401 CY7C402 CY7C403 CY7C404 D015341 10DC IR 3 P
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS Features 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO • Pin compatible with M M I 67401A/67402A • 64 x 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO) Functional Description

7c401

Contextual Info: CY7C401/CY7C403 7C402/CY7C404 PYPPFQ Q Cascadable 64 x 4 FIFO and 64 x 5 FIFO Features Functional Description • 64 x 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) High-speed first-in flrst-out memory (FIFO) • Processed with high-speed CMOS for

437q

Abstract: CY7C401 CY7C402 CY7C403 CY7C404 7C401 0G153
Contextual Info: CY7C401/CY7C403 7C402/CY7C404 CYPRESS Features • 64 x 4 CY7C401 and CY7C403 64 x 5 (7C402 and CY7C404) High-speed first-in first-out memory (FIFO) • Processed with high-speed CMOS for optimum speed/power • 25-MHz data rates • 50-ns bubble-through time—25 MHz