7C1347 Search Results

CY7C1347B

Abstract: memory depth expansion
Contextual Info: 7C1347 7C1347B 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium  and PowerPC operations with zero wait states

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

CY7C1347

Contextual Info: 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

CY7C1347B

Contextual Info: 7C1347B 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ=2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

Contextual Info: 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when V DDQ=2.5V. • Supports 1 0O-MHz bus for Pentium and PowerPC operations with zero wait states

CY7C1347

Contextual Info: 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

EPM5128LC

Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C

Contextual Info: fax id: 1113 ^ C Y P R ^ r i £ : L # # r # # l ¥ # t o F_^ IS S PREUMINARY Y i U l O ^r « C Y7C 1347 ' / n n l II V^l I Ik J ls llll 128K~ X 36 ^Synchronous-Pipelined Cache RAM Features Functional DescriDtion Description • Low 1.65 mW standby power (f=0, L version)

Contextual Info: PRELIMINARY 7C1347B 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ=2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

CY7C1347

Abstract: CY7C1347-133AC
Contextual Info: fax id: 1113 PRELIMINARY 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The 7C1347 is a 3.3V 128K by 36 synchronous-pipelined cache SRAM designed to support zero wait state secondary

Contextual Info: 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ=2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

CY7C1347B

Contextual Info: 7C1347B 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347B I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

EPM5128LC

Abstract: EPM5128GC epm5064lc-1 EPM5128LC1 59628867809r 5962-8984106LX EPM5128GI 7C19945DMB EPM5130GC-1 5962-8867812rx
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 5962-8753903LX 5962-8753902LX CY21L49-55C CY21L49-45C CY7C281 CY7C281A 5962-8863701LX 5962-8753902LX CY6116A-45C CY6116A-35C CY7C286 CY27H512 5962-8867003LX 5962-8867002LX CY6116A-55C CY6116A-45C

GVT71128G36B-3

Abstract: GVT71128G36T-6
Contextual Info: 347A 7C1347A/GVT71128G36 128K x 36 Synchronous Pipelined Burst SRAM Features • • • • • • • • • • • • • • • • • eral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining

CY7C1347

Abstract: 7C1347
Contextual Info: 347 7C1347 128K x 36 Synchronous-Pipelined Cache RAM Features The 7C1347 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

4918A

Abstract: CY7C1327C GVT71256DA18
Contextual Info: 7C1347C/GVT71128DA36 CY7C1327C/GVT71256DA18 256K x 18/128K x 36 Synchronous-Pipelined Cache RAM Features • • • • • • • • • • • • • • • • • • • Fast access times: 2.5 and 3.5 ns Fast clock speed: 250, 225, 200, and 166 MHz